watchdog_h8s2674.cxx

ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html

//==========================================================================
//
//      devs/watchdog/h8s/h8s2674/watchdog_h8s2674.cxx
//
//      Watchdog implementation for Hitachi H8S/2674 CPUs
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    yoshinori sato
// Contributors: yoshinori sato, Uwe Kindler
// Date:         2002-04-29
// Purpose:      Watchdog class implementation
// Description:  Contains an implementation of the Watchdog class for use
//               with the Hitachi H8/300H watchdog timer.
//
//####DESCRIPTIONEND####
//
//==========================================================================


//==========================================================================
//                                 INCLUDES
//==========================================================================
#include <pkgconf/system.h>             // system configuration file
#include <pkgconf/watchdog.h>           // configuration for this package
#include <pkgconf/devs_watchdog_h8s_h8s2674.h>

#include <cyg/infra/cyg_trac.h>         // tracing macros
#include <pkgconf/kernel.h>
#include <cyg/io/watchdog.hxx>          // watchdog API

#include <cyg/hal/hal_io.h>             // IO register access
#include <cyg/hal/mod_regs_wdt.h>       // watchdog register definitions




//==========================================================================
//                                 DEFINES
//==========================================================================
#if    CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 2
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_2
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 64
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_64
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 128
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_128
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 512
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_512
      
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 2048
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_2048
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 8192
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_8192
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 32768
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_32768
       
#elif  CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_DIVIDER_RATE == 131072
       #define CYGARC_TCSR_CKS CYGARC_TCSR_CKS_131072
#else
    #error "Wrong watchdog clock divider"
#endif


//==========================================================================
//                                 CONSTRUCTOR
// DESCRIPTION:
//     Creates watchdog object and initialises hardware watchdog
//==========================================================================
void Cyg_Watchdog::init_hw(void)
{
    CYG_REPORT_FUNCTION();
    
    // No hardware init needed.
    
    //
    // CYGNUM_DEVICES_WATCHDOG_H8S_H8S2674_PERIOD is calculated in the
    // watchdog_h8s2674.cdl file. This is the calculated time interval 
    // allowed between resets before watchdog triggers, in nanoseconds.
    //
    resolution          = CYGNUM_DEVS_WATCHDOG_H8S_H8S2674_PERIOD;

    CYG_REPORT_RETURN();
}


//==========================================================================
//                                START WATCHDOG TIMER
// DESCRIPTION:
//     Start the watchdog running.
//==========================================================================
void Cyg_Watchdog::start()
{     
    cyg_uint8 tmp;
    
    
    CYG_REPORT_FUNCTION();
    
    HAL_WRITE_UINT16(CYGARC_TCSRW, CYGARC_TCSR_MAGIC);  // stop WDT
    HAL_WRITE_UINT16(CYGARC_TCNTW, CYGARC_TCNT_MAGIC);  // Clear WDT Count
    //
    // enable reset if timer overflows
    //
    HAL_READ_UINT8(CYGARC_RSTCSRR, tmp);
    tmp |= CYGARC_RSTCSR_RSTE;                   
    HAL_WRITE_UINT16(CYGARC_RSTCSRW, tmp | CYGARC_RSTCSR_DATA_MAGIC);
    //
    // now start timer and hope it will never overflow
    //
    HAL_WRITE_UINT16(CYGARC_TCSRW, CYGARC_TCSR_MAGIC    
                                 | CYGARC_TCSR_WT
                                 | CYGARC_TCSR_TME
                                 | CYGARC_TCSR_CKS);
    
    CYG_REPORT_RETURN();
}


//==========================================================================
//                             RESET WATCHDOG TIMER
// DESCRIPTION:
//     Reset watchdog timer. This needs to be called regularly to prevent
//     the watchdog triggering
//==========================================================================
void Cyg_Watchdog::reset()
{    
    CYG_REPORT_FUNCTION();

    HAL_WRITE_UINT16(CYGARC_TCSRW, CYGARC_TCNT_MAGIC);
    
    CYG_REPORT_RETURN();
}

//--------------------------------------------------------------------------
// EOF watchdog_h8s2674.cxx