h8s_sci_serial.c

ecos移植到R8H系列的源码。源码包来自http://www.cetoni.de/develop/develop_ecosh8s_en.html

//==========================================================================
//
//      h8s_sci_serial.c
//
//      H8S Serial SCI I/O Interface Module (interrupt driven)
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   jskov
// Contributors:gthomas, jskov
// Date:        1999-05-24
// Purpose:     H8S Serial I/O module (interrupt driven version)
// Description: 
//
// Note: Since interrupt sources from the same SCI channel share the same
//       interrupt level, there is no risk of races when altering the
//       channel's control register from ISRs and DSRs. However, when 
//       altering the control register from user-level code, interrupts
//       must be disabled while the register is being accessed.
//
// FIXME: Receiving in polled mode prevents duplex transfers from working for
//        some reason.
//####DESCRIPTIONEND####
//==========================================================================


//==========================================================================
//                                 INCLUDES
//==========================================================================
#include <pkgconf/io_serial.h>
#include <pkgconf/io.h>

#include <cyg/io/io.h>
#include <cyg/hal/hal_intr.h>
#include <cyg/io/devtab.h>
#include <cyg/infra/diag.h>
#include <cyg/io/serial.h>


//==========================================================================
//                                 DEFINES
//==========================================================================
#define DEBUG 1

#if DEBUG & 1
cyg_uint32 int_cnt_tx_isr = 0;
cyg_uint32 int_cnt_rx_isr = 0;
cyg_uint32 int_cnt_tx_dsr = 0;
cyg_uint32 int_cnt_rx_dsr = 0;
#endif


//
// Only compile driver if an inline file with driver details was selected.
//
#ifdef CYGDAT_IO_SERIAL_H8S_SCI_INL

//==========================================================================
//                             CONFIGURATION DATA
//==========================================================================
//
// The SCI controller register layout
//
#define SCI_SCSMR                0      // serial mode register
#define SCI_SCBRR                1      // bit rate register
#define SCI_SCSCR                2      // serial control register
#define SCI_SCTDR                3      // transmit data register
#define SCI_SCSSR                4      // serial status register
#define SCI_SCRDR                5      // receive data register

//
// Stores bit mask to be written for different word lengths 
// H8S only supports 7 and 8 bits
//
static short select_word_length[] = {
    -1,                                  // CYGNUM_SERIAL_WORD_LENGTH_5 - not supported by H8S SCI
    -1,                                  // CYGNUM_SERIAL_WORD_LENGTH_6 - not supported by H8S SCI
     CYGARC_REG_SCSMR_CHR,               // CYGNUM_SERIAL_WORD_LENGTH_7
     0                                   // CYGNUM_SERIAL_WORD_LENGTH_8
};


//
// Stores conf. data for number of stop bits to be transfered
//
static short select_stop_bits[] = {
    -1,                                 //                        - not supported by H8S SCI
     0,                                 // CYGNUM_SERIAL_STOP_1
    -1,                                 // CYGNUM_SERIAL_STOP_1_5 - not supported by H8S SCI
    CYGARC_REG_SCSMR_STOP               // CYGNUM_SERIAL_STOP_2
};

//
// Stores parity
//
static short select_parity[] = {
    0,                                       // CYGNUM_SERIAL_PARITY_NONE
    CYGARC_REG_SCSMR_PE,                     // CYGNUM_SERIAL_PARITY_EVEN
    CYGARC_REG_SCSMR_PE|CYGARC_REG_SCSMR_OE, // CYGNUM_SERIAL_PARITY_ODD
   -1,                                       // CYGNUM_SERIAL_PARITY_MARK  - not supported by H8S SCI
   -1                                        // CYGNUM_SERIAL_PARITY_SPACE - not supported by H8S SCI
};

//
// stores baud rates and register setting for BRR register
//
static unsigned short select_baud[] = {
    0,                                                     // Unused
    CYGARC_SCBRR_CKSx(50)<<8     | CYGARC_SCBRR_N(50),
    CYGARC_SCBRR_CKSx(75)<<8     | CYGARC_SCBRR_N(75),
    CYGARC_SCBRR_CKSx(110)<<8    | CYGARC_SCBRR_N(110),
    CYGARC_SCBRR_CKSx(134)<<8    | CYGARC_SCBRR_N(134),
    CYGARC_SCBRR_CKSx(150)<<8    | CYGARC_SCBRR_N(150),
    CYGARC_SCBRR_CKSx(200)<<8    | CYGARC_SCBRR_N(200),
    CYGARC_SCBRR_CKSx(300)<<8    | CYGARC_SCBRR_N(300),
    CYGARC_SCBRR_CKSx(600)<<8    | CYGARC_SCBRR_N(600),
    CYGARC_SCBRR_CKSx(1200)<<8   | CYGARC_SCBRR_N(1200),
    CYGARC_SCBRR_CKSx(1800)<<8   | CYGARC_SCBRR_N(1800),
    CYGARC_SCBRR_CKSx(2400)<<8   | CYGARC_SCBRR_N(2400),
    CYGARC_SCBRR_CKSx(3600)<<8   | CYGARC_SCBRR_N(3600),
    CYGARC_SCBRR_CKSx(4800)<<8   | CYGARC_SCBRR_N(4800),
    CYGARC_SCBRR_CKSx(7200)<<8   | CYGARC_SCBRR_N(7200),
    CYGARC_SCBRR_CKSx(9600)<<8   | CYGARC_SCBRR_N(9600),
    CYGARC_SCBRR_CKSx(14400)<<8  | CYGARC_SCBRR_N(14400),
    CYGARC_SCBRR_CKSx(19200)<<8  | CYGARC_SCBRR_N(19200),
    CYGARC_SCBRR_CKSx(38400)<<8  | CYGARC_SCBRR_N(38400),
    CYGARC_SCBRR_CKSx(57600)<<8  | CYGARC_SCBRR_N(57600),
    CYGARC_SCBRR_CKSx(115200)<<8 | CYGARC_SCBRR_N(115200),
    CYGARC_SCBRR_CKSx(230400)<<8 | CYGARC_SCBRR_N(230400)
};


//==========================================================================
//                                 DATA TYPES
//==========================================================================
typedef struct h8s_sci_info {
    CYG_WORD       er_int_num;                // Error interrupt number
    CYG_WORD       rx_int_num;                // Receive interrupt number
    CYG_WORD       tx_int_num;                // Transmit interrupt number
    CYG_ADDRWORD   ctrl_base;                 // Base address of SCI controller
    cyg_interrupt  serial_er_interrupt;       
    cyg_interrupt  serial_rx_interrupt; 
    cyg_interrupt  serial_tx_interrupt;
    cyg_handle_t   serial_er_interrupt_handle; 
    cyg_handle_t   serial_rx_interrupt_handle; 
    cyg_handle_t   serial_tx_interrupt_handle;
    bool           tx_enabled;
    cyg_uint8      int_prio;                  // interrupt priority for all SCI interrupts of one single channel
} h8s_sci_info;


//==========================================================================
//                              LOCAL FUNCTIONS
//==========================================================================
static bool       h8s_serial_init(struct cyg_devtab_entry *tab);
static bool       h8s_serial_putc(serial_channel *chan, cyg_uint8 c);
static Cyg_ErrNo  h8s_serial_lookup(struct cyg_devtab_entry **tab, 
                                    struct cyg_devtab_entry  *sub_tab,
                                    const  char              *name);
static cyg_uint8  h8s_serial_getc(serial_channel *chan);
static Cyg_ErrNo  h8s_serial_set_config(serial_channel *chan, 
                                        cyg_uint32      key,
                                        const void     *xbuf, 
                                        cyg_uint32     *len);
static void       h8s_serial_start_xmit(serial_channel *chan);
static void       h8s_serial_stop_xmit(serial_channel *chan);

//----------------------------------------------------------------------------
// ISRs
//
static cyg_uint32 h8s_serial_tx_ISR(cyg_vector_t   vector, 
                                    cyg_addrword_t data);                                  
static cyg_uint32 h8s_serial_rx_ISR(cyg_vector_t   vector, 
                                    cyg_addrword_t data);                                  
static cyg_uint32 h8s_serial_er_ISR(cyg_vector_t   vector, 
                                    cyg_addrword_t data);
                                    
//----------------------------------------------------------------------------
// DSRs
//
static void       h8s_serial_tx_DSR(cyg_vector_t   vector,  
                                    cyg_ucount32   count, 
                                    cyg_addrword_t data);
static void       h8s_serial_rx_DSR(cyg_vector_t   vector, 
                                    cyg_ucount32   count, 
                                    cyg_addrword_t data);
                                    

//---------------------------------------------------------------------------
// Serial Functions Structure
//
static SERIAL_FUNS(h8s_serial_funs,         // the "C label for this structure    
                   h8s_serial_putc,         // send function
                   h8s_serial_getc,         // receive function
                   h8s_serial_set_config,   // port configure function
                   h8s_serial_start_xmit,   // turn on transmitter and allow transmit interrupts
                   h8s_serial_stop_xmit     // In interrupt mode, turn of the transmitter
    );


//---------------------------------------------------------------------------
// Here we include the configuration file provided by the platform serial
// driver
//
#include CYGDAT_IO_SERIAL_H8S_SCI_INL


//==========================================================================
//                           CONFIGURE SCI CHANNEL
// DESCRIPTION:
//     Internal function to actually configure the hardware to desired 
//     baud rate, etc.
//
// ARGUMENTS:
//     '*pchan'         Points to serial channel data
//     '*pnew_config'   Points to configuration data
//     'init'              
//
// RETURNS:
//     true on success else false
//==========================================================================
static bool h8s_serial_config_port(
                    serial_channel    *pchan, 
                    cyg_serial_info_t *pnew_config, 
                    bool               init)
{
    cyg_uint16    baud_divisor   = select_baud[pnew_config->baud];
    h8s_sci_info *ph8s_chan      = (h8s_sci_info *)pchan->dev_priv;
    cyg_uint8     _scr;
    cyg_uint8     _smr;


    // 
    // Check configuration request
    //
    if ((-1 == select_word_length[(pnew_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5)])
      || -1 == select_stop_bits[pnew_config->stop]
      || -1 == select_parity[pnew_config->parity]
      ||  0 == baud_divisor)
    {
        return false;
    }   
    //
    // Disable SCI interrupts while changing hardware
    //
    HAL_READ_UINT8(ph8s_chan->ctrl_base + SCI_SCSCR, _scr);
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCSCR, 0);
    //
    // Set databits, stopbits and parity.
    //
    _smr = select_word_length[(pnew_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5)] 
         | select_stop_bits[pnew_config->stop] 
         | select_parity[pnew_config->parity];
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCSMR, _smr);
    //
    // Set baud rate.
    //
    _smr &= ~CYGARC_REG_SCSMR_CKSx_MASK;
    _smr |= baud_divisor >> 8;
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCSMR, _smr);
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCBRR, baud_divisor & 0xff);
    //
    // Clear the status register.
    //
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCSSR, 0);
    //
    // if channel should be initialized the we do this here
    //
    if (init) 
    {
        //
        // Always enable transmitter and receiver.
        //
        _scr = CYGARC_REG_SCSCR_TE | CYGARC_REG_SCSCR_RE;
        //
        // enable interrupts only if buffers are present
        //
        if (pchan->out_cbuf.len != 0)
        {
            _scr |= CYGARC_REG_SCSCR_TIE; // enable tx interrupts
        }
        if (pchan->in_cbuf.len != 0)
        {
            _scr |= CYGARC_REG_SCSCR_RIE; // enable rx interrupts
        }
    }  // End of if (init) 
    HAL_WRITE_UINT8(ph8s_chan->ctrl_base + SCI_SCSCR, _scr);
    //
    // set new config a actual config in serial channel
    //
    if (pnew_config != &pchan->config) 
    {
        pchan->config = *pnew_config;
    }
    return true;
}


//==========================================================================
//                        INITIALIZE DEVICE AT BOOTSTRAP
// DESCRIPTION:
//     Function to initialize the device.  Called at bootstrap time.
//
// ARGUMENTS:
//     '*ptab'         Points to device tab entry of this driver        
//
// RETURNS:
//     true on success else false
//==========================================================================
static bool h8s_serial_init(struct cyg_devtab_entry *ptab)
{   
    serial_channel *pchan      = (serial_channel *)ptab->priv;
    h8s_sci_info   *ph8s_chan  = (h8s_sci_info *)pchan->dev_priv;
    bool            ret;
    
    //
    // Really only required for interrupt driven devices
    //
    (pchan->callbacks->serial_init)(pchan);
    //
    // If output buffer is present the we can initialize the transmit
    // interrupts and interrupt data for eCos
    //
    if (pchan->out_cbuf.len != 0) 
    {
        //
        // create interrupt object
        //
        cyg_drv_interrupt_create(ph8s_chan->tx_int_num,
                                 ph8s_chan->int_prio,
                                 (cyg_addrword_t)pchan, // Data item passed to interrupt handler
                                 h8s_serial_tx_ISR,
                                 h8s_serial_tx_DSR,
                                 &ph8s_chan->serial_tx_interrupt_handle,
                                 &ph8s_chan->serial_tx_interrupt);
        cyg_drv_interrupt_attach(ph8s_chan->serial_tx_interrupt_handle);
        ph8s_chan->tx_enabled = false;
    }
    //
    // If input buffer is present the we can initialize the receive
    // interrupts and interrupt data for eCos
    //
    if (pchan->in_cbuf.len != 0) 
    {
        //
        // receive error interrupt
        //
        cyg_drv_interrupt_create(ph8s_chan->rx_int_num,                 // vector to attach to
                                 ph8s_chan->int_prio,                   // priority
                                 (cyg_addrword_t)pchan,                 // Data item passed to interrupt handler
                                 h8s_serial_rx_ISR,                     // interrupt service routine
                                 h8s_serial_rx_DSR,   
                                 &ph8s_chan->serial_rx_interrupt_handle,// returned handle
                                 &ph8s_chan->serial_rx_interrupt);      // returned interrupt object
        cyg_drv_interrupt_attach(ph8s_chan->serial_rx_interrupt_handle);
        //
        // Receive error interrupt
        //
        cyg_drv_interrupt_create(ph8s_chan->er_int_num,
                                 ph8s_chan->int_prio,
                                 (cyg_addrword_t)pchan,                  // Data item passed to interrupt handler
                                 h8s_serial_er_ISR,