entry.s

针对华清远见的FS9200（其内核为at91rm9200）的一个基本引导程序

	GET at91rm9200dk.inc

AT91_USER_Stack_Begin	EQU	0x00204000
AT91_Stack_Begin		EQU	0x21ffff00;0x00204000

;------------------------ List of Exported resources -------------------------
		
	AREA	SelfBoot, CODE, READONLY
	
	ENTRY
	
ResetEntry		
;------------------------------------------------------------------------------
;  Define the vector table.
;  The reset vector jumps to the handler code.
;  All others just dead loop on themselves!
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
;    InitReset. This code is executed with the FLASH at address 0.
;------------------------------------------------------------------------------
startoftext
rstvec
	B	InitReset 
undefvec
	B	undefvec 
swivec
	B	swivec   
pabtvec
	B	pabtvec  
dabtvec
	B	dabtvec  
rsvdvec
	B	rsvdvec  
irqvec
	ldr	pc, [pc,#-0xF20]        
fiqvec
	ldr	pc, [pc,#-0xF20]       

;-------------------
;- The reset handler
;-------------------
InitReset

	; set the cpu to SVC32 mode	 
;	mrs     r0,cpsr
;	bic     r0,r0,#0x1f
;	orr     r0,r0,#0x13
;	msr     cpsr_cf,r0
	
	
	; relocate exeception table	
;	ldr	r0, =startoftext
;	ldr	r1, =0x0
;	mov	r2, #16
;copyex
;	subs	r2, r2, #1
;	ldr	r3, [r0], #4
;	str	r3, [r1], #4
;	bne	copyex

;------------------------------------------------------------------------------
;-Low level Init (PMC, AIC, EBI, ....)
;------------------------------------------------------------------------------
	
	ldr	r1, =AT91_USER_Stack_Begin
; Insure word alignement
	bic	r1, r1, #3
; Init stack USER
	mov     sp, r1
	
	IMPORT	AT91F_LowLevelInit
	bl 	AT91F_LowLevelInit
    
;---------------------------------
;- Setup the stack for each mode
;---------------------------------
	ldr	r0, =AT91_Stack_Begin

;- Set up Supervisor Mode and set SVC Mode Stack
	msr     CPSR_c, #(ARM_MODE_SVC | I_BIT | F_BIT)
; Init stack FIQ
	mov     r13, r0
 	sub     r0, r0, #SVC_STACK_SIZE

;- Set up Interrupt Mode and set IRQ Mode Stack
	msr     CPSR_c, #(ARM_MODE_IRQ | I_BIT | F_BIT)
; Init stack IRQ
	mov     r13, r0     
	sub     r0, r0, #IRQ_STACK_SIZE
 
;- Set up Fast Interrupt Mode and set FIQ Mode Stack
	msr     CPSR_c, #(ARM_MODE_FIQ | I_BIT | F_BIT)
; Init stack Abort
	mov     r13, r0
	sub     r0, r0, #FIQ_STACK_SIZE

;- Set up Abort Mode and set Abort Mode Stack
	msr     CPSR_c, #(ARM_MODE_ABORT | I_BIT | F_BIT)
; Init stack Abort
	mov     r13, r0
	sub     r0, r0, #ABT_STACK_SIZE
	
;- Set up Undefined Instruction Mode and set Undef Mode Stack
	msr     CPSR_c, #(ARM_MODE_UNDEF | I_BIT | F_BIT)
; Init stack Undef
	mov     r13, r0 
	sub     r0, r0, #UND_STACK_SIZE

;- Set up User Mode, set User Mode Stack and enable interrupts  
	msr     CPSR_c, #(ARM_MODE_SYS | F_BIT)
; Init stack Sup
	mov     r13, r0


;------------------------------------------------------------------------------
;- Branch on C code Main function (with interworking)
;----------------------------------------------------
;- Branch must be performed by an interworking call as either an ARM or Thumb 
;- main C function must be supported. This makes the code not position-
;- independant. A Branch with link would generate errors 
;------------------------------------------------------------------------------
copy_proc_beg
	adr	r0, ResetEntry
	ldr	r2, BaseOfROM
	cmp	r0, r2
	ldreq	r0, TopOfROM
	beq	InitRam	
	ldr r3, TopOfROM
0	
	ldmia	r0!, {r4-r7}
	stmia	r2!, {r4-r7}
	cmp	r2, r3
	bcc	%B0
	
	sub	r2, r2, r3
	sub	r0, r0, r2				
		
InitRam	
	ldr	r2, BaseOfBSS
	ldr	r3, BaseOfZero	
0
	cmp	r2, r3
	ldrcc	r1, [r0], #4
	strcc	r1, [r2], #4
	bcc	%B0	

	mov	r0,	#0
	ldr	r3,	EndOfBSS
1	
	cmp	r2,	r3
	strcc	r0, [r2], #4
	bcc	%B1	

	IMPORT	boot
	b boot
	
	IMPORT  |Image$$RO$$Base|	; Base of ROM code
	IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
	IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialise
	IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
	IMPORT  |Image$$ZI$$Limit|  ; to zero initialise	

BaseOfROM	DCD	|Image$$RO$$Base|
TopOfROM	DCD	|Image$$RO$$Limit|
BaseOfBSS	DCD	|Image$$RW$$Base|
BaseOfZero	DCD	|Image$$ZI$$Base|
EndOfBSS	DCD	|Image$$ZI$$Limit|

;------------------------------------------------------------------------------
;- Loop for ever
;---------------
;- End of application. Normally, never occur.
;- Could jump on Software Reset ( B 0x0 ).
;------------------------------------------------------------------------------
End
	b	End

	END