interrupts.c

bf537 CAN接口测试程序

#include "CAN_RX.h"

/*********************************************************************************
**																				**
** CAN_RCV_HANDLER - 	This ISR checks for the highest priority RX Mailbox		**
**						with an active interrupt and clears it.  If the IRQ is	**
**						from MB7, the received data into the DATA3 register is	**
**						checked for the received CAN command from the TX board.	**
**						The appropriate operating flags are set based on the	**
**						received command and the current operating mode.  The	**
**						received command is then transmitted over CAN back to	**
**						the TX board.  Custom processing code can be inserted	**
**						where depicted.											**
**																				**
*********************************************************************************/
EX_INTERRUPT_HANDLER(CAN_RCV_HANDLER)
{
	char  highMB;				/* Which CAN Registers Should Be Used (1 or 2)	*/
	short mbim_status;			/* Temp Location for Interrupt Status			*/
	short bit_pos = 0;			/* Offset Into MBxIF Registers					*/
	
	mbim_status = *pCAN_MBRIF2;
	
	if (mbim_status == 0)				/* If High 16 MBs Have No Active IRQ	*/
	{
		mbim_status = *pCAN_MBRIF1;		/* Check Low 16 MBs						*/
		highMB = 0;						/* Clear High/Low* Indicator			*/
	}
	
	else								/* Otherwise, High MB IRQ Found			*/
		highMB = 1;						/* Set High/Low* Indicator				*/

	while (!(mbim_status & 0x8000))		/* Scan Status For Highest MB IRQ		*/
	{
		mbim_status <<= 1;
		bit_pos++;						/* bit_pos Contains Offset from MB31	*/
	}
	
	bit_pos = 1 << (15 - bit_pos);		/* Place Mask for Clearing Status 		*/
	
	if (highMB)
	{
		/* /// Insert Processing Code Here ///									*/
		*pCAN_MBRIF2 	= bit_pos;
		*pCAN_RMP2 		= bit_pos;
	}
	
	else		/* Low Mailbox Interrupt										*/
	{
		/* /// Insert Processing Code Here /// 									*/
		if(bit_pos == MBRIF7)	/* if Mailbox7 IRQ								*/
		{
			switch(*(pCAN_MB_DATA3(7)) & 0xFF00)	/* Mask Off Low Byte		*/
			{
				case(0x0400):		/* check for off command					*/
					if (!off)		/* if not in OFF mode						*/
					{
						off = 1;	/* set OFF flag								*/
						blink = 0;	/* clear BLINK flag							*/
					} /* end if off												*/
					
					break;

				case(0x0300):		/* check for scroll left command			*/
					if(blink|off)	/* if current mode is blink or off			*/
						change = 1;	/* switch to scroll is a mode change		*/
					else			/* otherwise we were scrolling already		*/
						change = 0;	/* no mode change							*/
						
					blink = 0;		/* make sure BLINK is cleared				*/
					off = 0;		/* make sure OFF is cleared					*/
					scroll = 1;		/* Set for Scroll Left						*/
					break;
				
				case(0x0200):		/* check for scroll right command 			*/
					if(blink|off)	/* if current mode is blink or off 			*/
						change = 1;	/* switch to scroll is a mode change 		*/
					else			/* otherwise we were scrolling already 		*/
						change = 0;	/* no mode change 							*/
						
					blink = 0;		/* make sure BLINK is cleared 				*/
					off = 0;		/* make sure OFF is cleared 				*/
					scroll = 0;		/* Set for Scroll Right 					*/
					break;
				
				case(0x0100):		/* check for blink command 					*/
					if(blink)		/* if blinking already 						*/
						change = 0;	/* no mode change 							*/
					else			/* otherwise it was off or scroll 			*/
						change = 1;	/* set mode change 							*/
						
					off = 0;		/* make sure OFF is cleared 				*/
					blink = 1;		/* set BLINK flag 							*/
					display = 0x0FC0;	/* display all LEDs on 					*/
					break;
				
				default:			/* unrecognized command, go to OFF mode 	*/
					off = 1;		/* set OFF flag 							*/
					blink = 0;		/* clear BLINK flag 						*/
			} /* end switch */
			
			/* Place Received Command Into CAN TX Mailbox 						*/
			*(pCAN_MB_DATA3(24)) = *(pCAN_MB_DATA3(7));
			ssync();

			/* Issue CAN Transmit Request 										*/
			*pCAN_TRS2 = CAN_TX_MB_HI;
			ssync();
		} /* end if Mailbox 7 													*/
		
		*pCAN_MBRIF1 	= bit_pos;	/* W1C RX IRQ 								*/
		*pCAN_RMP1 		= bit_pos;	/* W1C Msg Pending Status Bit 				*/
	}
	
	ssync();
	
} /* end CAN_RCV_HANDLER 														*/

/*********************************************************************************
**																				**
** CAN_XMT_HANDLER - 	This ISR checks for the highest priority TX Mailbox		**
**						with an active interrupt and clears it.  Additional		**
**						processing code can be added where indicated.			**
**																				**
*********************************************************************************/
EX_INTERRUPT_HANDLER(CAN_XMT_HANDLER)
{
	char  highMB;				/* Which CAN Registers Should Be Used (1 or 2) 	*/
	short mbim_status;			/* Temp Location for Interrupt Status 			*/
	short bit_pos = 0;			/* Offset Into MBxIF Registers 					*/
	
	mbim_status = *pCAN_MBTIF2;			/* Check High MBoxes First 				*/
	
	if (mbim_status == 0)				/* If No High MB Interrupts 			*/
	{
		mbim_status = *pCAN_MBTIF1;		/* Check Low MB Interrupts 				*/
		highMB = 0;						/* Clear High/Low* Mailbox Indicator 	*/
	}
	
	else highMB = 1;					/* Set High/Low* Mailbox Indicator 		*/
	
	while (!(mbim_status & 0x8000))		/* Find Highest Mailbox W/ Active IRQ 	*/
	{
		mbim_status <<= 1;
		bit_pos++;
	} /* Interrupting Mailbox Found 											*/
	
	bit_pos = 1 << (15 - bit_pos);		/* Place Mask for Clearing Status 		*/

	if (highMB)		/* Process High Mailbox IRQ 								*/
	{
		/* /// Insert Processing Code Here /// 									*/
		*pCAN_MBTIF2 = bit_pos;
		*pCAN_TA2	 = bit_pos;
	}
	
	else			/* Else, Process Low Mailbox IRQ 							*/
	{
		/* /// Insert Processing Code Here /// 									*/
		*pCAN_MBTIF1 	= bit_pos;
		*pCAN_TA1 		= bit_pos;
	}
	
	ssync();

} /* end CAN_XMT_HANDLER 														*/