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Vxworks API操作系统和驱动程序设计API。压缩的HTML文件

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<a name="pentiumP5PmcGet1"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumP5PmcGet1(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumP5PmcGet1(&nbsp;)</strong> - get the contents of P5 PMC1</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumP5PmcGet1 (pPmc1)
    long long int * pPmc1;            /* Performance Monitoring Counter 1 */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine gets a content of PMC1 (Performance Monitoring Counter 1).
Parameter is a pointer of 64Bit variable to store the content of the Counter.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumP5PmcReset"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumP5PmcReset(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumP5PmcReset(&nbsp;)</strong> - reset both PMC0 and PMC1</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumP5PmcReset (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine resets both PMC0 (Performance Monitoring Counter 0) and PMC1.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumP5PmcReset0"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumP5PmcReset0(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumP5PmcReset0(&nbsp;)</strong> - reset PMC0</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumP5PmcReset0 (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine resets PMC0 (Performance Monitoring Counter 0).
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumP5PmcReset1"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumP5PmcReset1(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumP5PmcReset1(&nbsp;)</strong> - reset PMC1</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumP5PmcReset1 (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine resets PMC1 (Performance Monitoring Counter 1).
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumTscGet64"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumTscGet64(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumTscGet64(&nbsp;)</strong> - get 64Bit TSC (Timestamp Counter)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumTscGet64 (pTsc)
    long long int * pTsc;             /* Timestamp Counter */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine gets 64Bit TSC by RDTSC instruction.
Parameter is a pointer of 64Bit variable to store the content of the Counter.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumTscGet32"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumTscGet32(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumTscGet32(&nbsp;)</strong> - get the lower half of the 64Bit TSC (Timestamp Counter)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>UINT32 pentiumTscGet32 (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine gets a lower half of the 64Bit TSC by RDTSC instruction.
RDTSC instruction saves the lower 32Bit in EAX register, so this routine
simply returns after executing RDTSC instruction.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
Lower half of the 64Bit TSC (Timestamp Counter)
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumTscReset"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumTscReset(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumTscReset(&nbsp;)</strong> - reset the TSC (Timestamp Counter)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumTscReset (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine resets the TSC by writing zero to the TSC with WRMSR
instruction.  
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumMsrGet"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumMsrGet(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumMsrGet(&nbsp;)</strong> - get the contents of the specified MSR (Model Specific Register)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumMsrGet (addr, pData)
    int addr;                 /* MSR address */
    long long int * pData;            /* MSR data */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine gets the contents of the specified MSR.  The first parameter is
an address of the MSR.  The second parameter is a pointer of 64Bit variable.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumMsrSet"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumMsrSet(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumMsrSet(&nbsp;)</strong> - set a value to the specified MSR (Model Specific Registers)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumMsrSet (addr, pData)
    int addr;                         /* MSR address */
    long long int * pData;            /* MSR data */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine sets a value to a specified MSR.  The first parameter is an
address of the MSR.  The second parameter is a pointer of 64Bit variable.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumTlbFlush"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumTlbFlush(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumTlbFlush(&nbsp;)</strong> - flush TLBs (Translation Lookaside Buffers)</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumTlbFlush (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine flushes TLBs by loading the CR3 register.
All of the TLBs are automatically invalidated any time the CR3 register is
loaded.  The page global enable (PGE) flag in register CR4 and the global
flag in a page-directory or page-table entry can be used to frequently used
pages from being automatically invalidated in the TLBs on a load of CR3
register.  The only way to deterministically invalidate global page entries
is to clear the PGE flag and then invalidate the TLBs.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumSerialize"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumSerialize(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumSerialize(&nbsp;)</strong> - execute a serializing instruction CPUID</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>void pentiumSerialize (void)
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine executes a serializing instruction CPUID.
Serialization means that all modifications to flags, registers, and memory
by previous instructions are completed before the next instruction is fetched
and executed and all buffered writes have drained to memory.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
N/A
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumBts"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumBts(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumBts(&nbsp;)</strong> - execute atomic compare-and-exchange instruction to set a bit</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>STATUS pentiumBts (pFlag)
    char * pFlag;                     /* flag address */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine compares a byte specified by the first parameter with 0.
If it is 0, it changes it to TRUE and returns OK.
If it is not 0, it returns ERROR.  LOCK and CMPXCHGB are used to get 
the atomic memory access.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
OK or ERROR if the specified flag is not zero.
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

<hr>
<a name="pentiumBtc"></a>
<p align=right>
<a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p>

</blockquote><h1>pentiumBtc(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong>pentiumBtc(&nbsp;)</strong> - execute atomic compare-and-exchange instruction to clear a bit</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>STATUS pentiumBtc (pFlag)
    char * pFlag;                     /* flag address */
</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
<p>

This routine compares a byte specified by the first parameter with TRUE.
If it is TRUE, it changes it to 0 and returns OK.
If it is not TRUE, it returns ERROR.  LOCK and CMPXCHGB are used to get 
the atomic memory access.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
OK or ERROR if the specified flag is not TRUE
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./pentiumALib.html#top">pentiumALib</a></b>

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