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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/vxLib.html - generated by refgen from vxLib.c --> <title> vxLib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.htm"><i>VxWorks API Reference :  OS Libraries</i></a></p></blockquote><h1>vxLib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxLib</strong> - miscellaneous support routines </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><a href="./vxLib.html#vxTas">vxTas</a>(&nbsp;)</b>  -  C-callable atomic test-and-set primitive<br><b><a href="./vxLib.html#vxMemArchProbe">vxMemArchProbe</a>(&nbsp;)</b>  -  architecture specific part of vxMemProbe<br><b><a href="./vxLib.html#vxMemProbe">vxMemProbe</a>(&nbsp;)</b>  -  probe an address for a bus error<br><b><a href="./vxLib.html#vxSSEnable">vxSSEnable</a>(&nbsp;)</b>  -  enable the superscalar dispatch (MC68060)<br><b><a href="./vxLib.html#vxSSDisable">vxSSDisable</a>(&nbsp;)</b>  -  disable the superscalar dispatch (MC68060)<br><b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b>  -  set the power management mode (PowerPC, SH, x86)<br><b><a href="./vxLib.html#vxPowerModeGet">vxPowerModeGet</a>(&nbsp;)</b>  -  get the power management mode (PowerPC, SH, x86)<br><b><a href="./vxLib.html#vxPowerDown">vxPowerDown</a>(&nbsp;)</b>  -  place the processor in reduced-power mode (PowerPC, SH)<br><b><a href="./vxLib.html#vxCr0Get">vxCr0Get</a>(&nbsp;)</b>  -  get a content of the Control Register 0 (x86)<br><b><a href="./vxLib.html#vxCr0Set">vxCr0Set</a>(&nbsp;)</b>  -  set a value to the Control Register 0 (x86)<br><b><a href="./vxLib.html#vxCr2Get">vxCr2Get</a>(&nbsp;)</b>  -  get a content of the Control Register 2 (x86)<br><b><a href="./vxLib.html#vxCr2Set">vxCr2Set</a>(&nbsp;)</b>  -  set a value to the Control Register 2 (x86)<br><b><a href="./vxLib.html#vxCr3Get">vxCr3Get</a>(&nbsp;)</b>  -  get a content of the Control Register 3 (x86)<br><b><a href="./vxLib.html#vxCr3Set">vxCr3Set</a>(&nbsp;)</b>  -  set a value to the Control Register 3 (x86)<br><b><a href="./vxLib.html#vxCr4Get">vxCr4Get</a>(&nbsp;)</b>  -  get a content of the Control Register 4 (x86)<br><b><a href="./vxLib.html#vxCr4Set">vxCr4Set</a>(&nbsp;)</b>  -  set a value to the Control Register 4 (x86)<br><b><a href="./vxLib.html#vxEflagsGet">vxEflagsGet</a>(&nbsp;)</b>  -  get a content of the EFLAGS register (x86)<br><b><a href="./vxLib.html#vxEflagsSet">vxEflagsSet</a>(&nbsp;)</b>  -  set a value to the EFLAGS register (x86)<br><b><a href="./vxLib.html#vxDrGet">vxDrGet</a>(&nbsp;)</b>  -  get a content of the Debug Register 0 to 7 (x86)<br><b><a href="./vxLib.html#vxDrSet">vxDrSet</a>(&nbsp;)</b>  -  set a value to the Debug Register 0 to 7 (x86)<br><b><a href="./vxLib.html#vxTssGet">vxTssGet</a>(&nbsp;)</b>  -  get a content of the TASK register (x86)<br><b><a href="./vxLib.html#vxTssSet">vxTssSet</a>(&nbsp;)</b>  -  set a value to the TASK register (x86)<br><b><a href="./vxLib.html#vxGdtrGet">vxGdtrGet</a>(&nbsp;)</b>  -  get a content of the Global Descriptor Table Register (x86)<br><b><a href="./vxLib.html#vxIdtrGet">vxIdtrGet</a>(&nbsp;)</b>  -  get a content of the Interrupt Descriptor Table Register (x86)<br><b><a href="./vxLib.html#vxLdtrGet">vxLdtrGet</a>(&nbsp;)</b>  -  get a content of the Local Descriptor Table Register (x86)<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This module contains miscellaneous VxWorks support routines.<p></blockquote><h4>INCLUDE FILES</h4><blockquote><p><b>vxLib.h</b><hr><a name="vxTas"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxTas(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxTas(&nbsp;)</strong> - C-callable atomic test-and-set primitive</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>BOOL vxTas    (    void * address            /* address to test and set */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine provides a C-callable interface to a test-and-setinstruction.  The test-and-set instruction is executed on the specifiedaddress.  The architecture test-and-set instruction is:<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;68K:&nbsp;&nbsp;&nbsp;&nbsp;<b>tas</b><br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;x86:&nbsp;&nbsp;&nbsp;&nbsp;<b>lock&nbsp;bts</b><br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SH:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<b>tas.b</b><br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ARM:&nbsp;&nbsp;&nbsp;&nbsp;<b>swpb</b><p>This routine is equivalent to <b><a href="./sysLib.html#sysBusTas">sysBusTas</a>(&nbsp;)</b> in <b><a href="./sysLib.html#top">sysLib</a></b>.<p></blockquote><h4>MIPS</h4><blockquote><p><p>Because VxWorks does not support the MIPS MMU, only kseg0 and kseg1addresses are accepted; other addresses return FALSE. <p></blockquote><h4>NOTE X86</h4><blockquote><p><p>BTS "Bit Test and Set" instruction is executed with LOCK instruction prefixto lock the Bus during the execution.  The bit position 0 is toggled.<p></blockquote><h4>NOTE SH</h4><blockquote><p><p>The SH version of <b><a href="./vxLib.html#vxTas">vxTas</a>(&nbsp;)</b> simply executes the <b>tas.b</b> instruction, and thetest-and-set (atomic read-modify-write) operation may require an externalbus locking mechanism on some hardware.  In this case, wrap the <b><a href="./vxLib.html#vxTas">vxTas</a>(&nbsp;)</b>with a bus locking and unlocking code in the <b><a href="./sysLib.html#sysBusTas">sysBusTas</a>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p><p>TRUE if the value had not been set (but is now), or FALSE if thevalue was set already.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b>, <b><a href="./sysLib.html#sysBusTas">sysBusTas</a>(&nbsp;)</b><hr><a name="vxMemArchProbe"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxMemArchProbe(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxMemArchProbe(&nbsp;)</strong> - architecture specific part of vxMemProbe</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS vxMemArchProbe    (    char * adrs,              /* address to be probed */    int    mode,              /* VX_READ or VX_WRITE */    int    length,            /* 1, 2, 4, or 8 */    char * pVal               /* where to return value, or ptr to value */                              /* to be written */     )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This is the routine implementing the architecture specific part of thevxMemProbe routine.  It traps the relevant exceptionswhile accessing the specified address.  If anexception occurs, then the result will be ERROR.  If no exception occursthen the result will be OK.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK or ERROR if an exception occurred during access.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b><hr><a name="vxMemProbe"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxMemProbe(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxMemProbe(&nbsp;)</strong> - probe an address for a bus error</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS vxMemProbe    (    char * adrs,              /* address to be probed */    int    mode,              /* VX_READ or VX_WRITE */    int    length,            /* 1, 2, 4, or 8 */    char * pVal               /* where to return value, or ptr to value */                              /* to be written */     )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine probes a specified address to see if it is readable orwritable, as specified by <i>mode</i>.  The address is read or written as1, 2, or 4 bytes, as specified by <i>length</i> (values other than 1, 2, or 4yield unpredictable results).  If the probe is a <b>VX_READ</b> (0), the valueread is copied to the location pointed to by <i>pVal</i>.  If the probe is a<b>VX_WRITE</b> (1), the value written is taken from the location pointed to by<i>pVal</i>.  In either case, <i>pVal</i> should point to a value of 1, 2, or 4bytes, as specified by <i>length</i>.<p>Note that only bus errors are trapped during the probe, and that theaccess must otherwise be valid (i.e., it must not generate an address error).<p></blockquote><h4>EXAMPLE</h4><blockquote><p><pre>    testMem (adrs)        char *adrs;        {        char testW = 1;        char testR;        if (vxMemProbe (adrs, VX_WRITE, 1, &amp;testW) == OK)            printf ("value %d written to adrs %x\n", testW, adrs);        if (vxMemProbe (adrs, VX_READ, 1, &amp;testR) == OK)            printf ("value %d read from adrs %x\n", testR, adrs);        }</pre></blockquote><h4>MODIFICATION</h4><blockquote><p>The BSP can modify the behaviour of <b><a href="./vxLib.html#vxMemProbe">vxMemProbe</a>(&nbsp;)</b> by supplying an alternateroutine and placing the address in the global variable<b>_func_vxMemProbeHook</b>.  The BSP routine will be called instead of thearchitecture specific routine <b><a href="./vxLib.html#vxMemArchProbe">vxMemArchProbe</a>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p><p>OK, or ERROR if the probe caused a bus error or was misaligned.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b>, <b><a href="./vxLib.html#vxMemArchProbe">vxMemArchProbe</a>(&nbsp;)</b><hr><a name="vxSSEnable"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxSSEnable(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxSSEnable(&nbsp;)</strong> - enable the superscalar dispatch (MC68060)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void vxSSEnable (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This function sets the ESS bit of the Processor Configuration Register (PCR)to enable the superscalar dispatch.<p></blockquote><h4>RETURNS </h4><blockquote><p>N/A</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b><hr><a name="vxSSDisable"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxSSDisable(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxSSDisable(&nbsp;)</strong> - disable the superscalar dispatch (MC68060)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void vxSSDisable (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This function resets the ESS bit of the Processor Configuration Register (PCR)to disable the superscalar dispatch.<p></blockquote><h4>RETURNS </h4><blockquote><p>N/A</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b><hr><a name="vxPowerModeSet"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxPowerModeSet(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxPowerModeSet(&nbsp;)</strong> - set the power management mode (PowerPC, SH, x86)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS vxPowerModeSet    (    UINT32 mode               /* power management mode to select */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine selects the power management mode to be activated when<b><a href="./vxLib.html#vxPowerDown">vxPowerDown</a>(&nbsp;)</b> is called.  <b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b> is normally called in the BSPinitialization routine <b><a href="./sysLib.html#sysHwInit">sysHwInit</a>(&nbsp;)</b>.<p></blockquote><h4>USAGE PPC</h4><blockquote><p><p>Power management modes include the following:<dl><dt><b>VX_POWER_MODE_DISABLE</b> (0x1)<dd>Power management is disabled; this prevents the MSR(POW) bit from beingset (all PPC).<dt><b>VX_POWER_MODE_FULL</b> (0x2)<dd>All CPU units are active while the kernel is idle (PPC603, PPCEC603 andPPC860 only).<dt><b>VX_POWER_MODE_DOZE</b> (0x4)<dd>Only the decrementer, data cache, and bus snooping are active while thekernel is idle (PPC603, PPCEC603 and PPC860).<dt><b>VX_POWER_MODE_NAP</b> (0x8)<dd>Only the decrementer is active while the kernel is idle (PPC603, PPCEC603 andPPC604 ).<dt><b>VX_POWER_MODE_SLEEP</b> (0x10)<dd>All CPU units are inactive while the kernel is idle (PPC603, PPCEC603 andPPC860 - not recommended for the PPC603 and PPCEC603 architecture).<dt><b>VX_POWER_MODE_DEEP_SLEEP</b> (0x20)<dd>All CPU units are inactive while the kernel is idle (PPC860 only - notrecommended).<dt><b>VX_POWER_MODE_DPM</b> (0x40)<dd>Dynamic Power Management Mode (PPC603 and PPCEC603 only).<dt><b>VX_POWER_MODE_DOWN</b> (0x80)<dd>Only a hard reset causes an exit from power-down low power mode (PPC860 only- not recommended).</dl></blockquote><h4>USAGE SH</h4><blockquote><p><p>Power management modes include the following:<dl><dt><b>VX_POWER_MODE_DISABLE</b> (0x0)<dd>Power management is disabled.<dt><b>VX_POWER_MODE_SLEEP</b> (0x1)<dd>The core CPU is halted, on-chip peripherals operating, external memoryrefreshing.<dt><b>VX_POWER_MODE_DEEP_SLEEP</b> (0x2)<dd>The core CPU is halted, on-chip peripherals operating, external memoryself-refreshing (SH-4 only).<dt><b>VX_POWER_MODE_USER</b> (0xff)<dd>Set up to three 8-bit standby registers with user-specified values:<pre>    vxPowerModeSet (VX_POWER_MODE_USER | sbr1&lt;&lt;8 | sbr2&lt;&lt;16 | sbr3&lt;&lt;24);</pre>The sbr1 value is written to the STBCR or SBYCR1, sbr2 is written tothe STBCR2 or SBYCR2, and sbr3 is written to the STBCR3 register (whenavailable), depending on the SH processor type.<p></dl></blockquote><h4>USAGE X86</h4><blockquote><p><p><b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b> is called in the BSP initialization routine <b><a href="./sysLib.html#sysHwInit">sysHwInit</a>(&nbsp;)</b>.Power management modes include the following:<dl><dt><b>VX_POWER_MODE_DISABLE</b> (0x1)<dd>Power management is disable: this prevents halting the CPU.<dt><b>VX_POWER_MODE_AUTOHALT</b> (0x4)<dd>Power management is enable: this allows halting the CPU.</dl></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if <i>mode</i> is incorrect or not supported by theprocessor.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b>, <b><a href="./vxLib.html#vxPowerModeGet">vxPowerModeGet</a>(&nbsp;)</b>, <b><a href="./vxLib.html#vxPowerDown">vxPowerDown</a>(&nbsp;)</b><hr><a name="vxPowerModeGet"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxPowerModeGet(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxPowerModeGet(&nbsp;)</strong> - get the power management mode (PowerPC, SH, x86)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>UINT32 vxPowerModeGet (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine returns the power management mode set by <b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p><p>The power management mode, or ERROR if no mode has been selected or if power management is not supported.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./vxLib.html#top">vxLib</a></b>, <b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b>, <b><a href="./vxLib.html#vxPowerDown">vxPowerDown</a>(&nbsp;)</b><hr><a name="vxPowerDown"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries :  Routines</i></a></p></blockquote><h1>vxPowerDown(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>vxPowerDown(&nbsp;)</strong> - place the processor in reduced-power mode (PowerPC, SH)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>UINT32 vxPowerDown (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine activates the reduced-power mode if power management is enabled.It is called by the scheduler when the kernel enters the idle loop.The power management mode is selected by <b><a href="./vxLib.html#vxPowerModeSet">vxPowerModeSet</a>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if power management is not supported or if externalinterrupts are disabled.

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