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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/mmuPro32Lib.html - generated by refgen from ../i86/mmuPro32Lib.c --> <title> mmuPro32Lib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.htm"><i>VxWorks API Reference : OS Libraries</i></a></p></blockquote><h1>mmuPro32Lib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>mmuPro32Lib</strong> - MMU library for PentiumPro/2/3/4 32 bit mode </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><a href="./mmuPro32Lib.html#mmuPro32LibInit">mmuPro32LibInit</a>( )</b> - initialize module<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p><p><b>mmuPro32Lib.c</b> provides the architecture dependent routines that directly controlthe memory management unit. It provides 10 routines that are called by thehigher level architecture independent routines in <b>vmLib.c</b>: <p> <b><a href="./mmuPro32Lib.html#mmuPro32LibInit">mmuPro32LibInit</a>( )</b> - initialize module<br> <b>mmuTransTblCreate( )</b> - create a new translation table<br> <b>mmuTransTblDelete( )</b> - delete a translation table.<br> <b>mmuPro32Enable( )</b> - turn MMU on or off<br> <b>mmuStateSet( )</b> - set state of virtual memory page<br> <b>mmuStateGet( )</b> - get state of virtual memory page<br> <b>mmuPageMap( )</b> - map physical memory page to virtual memory page<br> <b>mmuGlobalPageMap( )</b> - map physical memory page to global virtual memory page<br> <b>mmuTranslate( )</b> - translate a virtual address to a physical address<br> <b>mmuCurrentSet( )</b> - change active translation table<p>Applications using the MMU will never call these routines directly; the visible interface is supported in <b>vmLib.c</b>.<p><b>mmuLib</b> supports the creation and maintenance of multiple translation tables,one of which is the active translation table when the MMU is enabled. Note that VxWorks does not include a translation table as part of the taskcontext; individual tasks do not reside in private virtual memory. However,we include the facilities to create multiple translation tables so thatthe user may create "private" virtual memory contexts and switch them in anapplication specific manner. Newtranslation tables are created with a call to <b>mmuTransTblCreate( )</b>, and installedas the active translation table with <b>mmuCurrentSet( )</b>. Translation tablesare modified and potentially augmented with calls to <b>mmuPageMap( )</b> and <b>mmuStateSet( )</b>.The state of portions of the translation table can be read with calls to <b>mmuStateGet( )</b> and <b>mmuTranslate( )</b>.<p>The traditional VxWorks architecture and design philosophy requires that allobjects and operating systems resources be visible and accessible to all agents(tasks, isrs, watchdog timers, etc) in the system. This has traditionally beeninsured by the fact that all objects and data structures reside in physical memory; thus, a data structure created by one agent may be accessed by anyother agent using the same pointer (object identifiers in VxWorks are oftenpointers to data structures.) This creates a potential problem if you have multiple virtual memory contexts. For example, if asemaphore is created in one virtual memory context, you must guarantee thatthat semaphore will be visible in all virtual memory contexts if the semaphoreis to be accessed at interrupt level, when a virtual memory context other thanthe one in which it was created may be active. Another example is thatcode loaded using the incremental loader from the shell must be accessiblein all virtual memory contexts, since code is shared by all agents in thesystem.<p>This problem is resolved by maintaining a global "transparent" mappingof virtual to physical memory for all the contiguous segments of physical memory (on board memory, i/o space, sections of vme space, etc) that is sharedby all translation tables; all available physical memory appears at the same address in virtual memory in all virtual memory contexts. This technique provides an environment that allowsresources that rely on a globally accessible physical address to run withoutmodification in a system with multiple virtual memory contexts.<p>An additional requirement is that modifications made to the state of global virtual memory in one translation table appear in all translation tables. Forexample, memory containing the text segment is made read only (to avoidaccidental corruption) by setting the appropriate writable bits in the translation table entries corresponding to the virtual memory containing the text segment. This state information must be shared by all virtual memory contexts, so that no matter what translation table is active, the text segmentis protected from corruption. The mechanism that implements this feature isarchitecture dependent, but usually entails building a section of a translation table that corresponds to the global memory, that is shared byall other translation tables. Thus, when changes to the state of the globalmemory are made in one translation table, the changes are reflected in allother translation tables.<p><b>mmuLib</b> provides a separate call for constructing global virtual memory -<b>mmuGlobalPageMap( )</b> - which creates translation table entries that are sharedby all translation tables. Initialization code in usrConfig makes callsto <b><a href="./vmLib.html#vmGlobalMap">vmGlobalMap</a>( )</b> (which in turn calls <b>mmuGlobalPageMap( )</b>) to set up global transparent virtual memory for allavailable physical memory. All calls made to <b>mmuGlobalPageMap( )</b> must occur before any virtual memory contexts are created; changes made to global virtualmemory after virtual memory contexts are created are not guaranteed to be reflected in all virtual memory contexts.<p>Most MMU architectures will dedicate some fixed amount of virtual memory to a minimal section of the translation table (a "segment", or "block"). This creates a problem in that the user may map a small section of virtual memoryinto the global translation tables, and then attempt to use the virtual memoryafter this section as private virtual memory. The problem is that the translation table entries for this virtual memory are contained in the global translation tables, and are thus shared by all translation tables. This condition is detected by vmMap, and an error is returned, thus, the lowerlevel routines in <b>mmuPro32Lib.c</b> (<b>mmuPageMap( )</b>, <b>mmuGlobalPageMap( )</b>) need not perform any error checking.<p>A global variable <b>mmuPageBlockSize</b> should be defined which is equal to the minimum virtual segment size. <b>mmuLib</b> must provide a routine <b>mmuGlobalInfoGet( )</b>, which returns a pointer to the globalPageBlock[] array.This provides the user with enough information to be able to allocate virtual memory space that does not conflict with the global memory space.<p>This module supports the PentiumPro/2/3/4 MMU:<p><pre> PDBR | | ------------------------------------- top level |pde |pde |pde |pde |pde |pde | ... ------------------------------------- | | | | | | | | | | | | ---------- | v v v v | ------ NULL NULL NULL NULL | | v v ---- ---- l |pte | |pte |o ---- ----w |pte | |pte | e ---- ----r |pte | |pte |l ---- ----e |pte | |pte |v ---- ----e . .l . . . .</pre>where the top level consists of an array of pointers (Page Directory Entry)held within a single 4k page. These point to arrays of Page Table Entry arrays in the lower level. Each of these lower level arrays is also held within a single 4k page, and describes a virtual space of 4 MB (each Page Table Entry is 4 bytes, so we get 1000 of these in each array, and each PageTable Entry maps a 4KB page - thus 1000 * 4096 = 4MB.) <p>To implement global virtual memory, a separate translation table called mmuGlobalTransTbl is created when the module is initialized. Calls to mmuGlobalPageMap will augment and modify this translation table. When newtranslation tables are created, memory for the top level array of sftd's isallocated and initialized by duplicating the pointers in mmuGlobalTransTbl'stop level sftd array. Thus, the new translation table will use the globaltranslation table's state information for portions of virtual memory that aredefined as global. Here's a picture to illustrate:<p><pre> GLOBAL TRANS TBL NEW TRANS TBL PDBR PDBR | | | | ------------------------- ------------------------- top level |pde |pde | NULL| NULL| |pde |pde | NULL| NULL| ------------------------- ------------------------- | | | | | | | | | | | | | | | | ---------- | v v ---------- | v v | ------ NULL NULL | | NULL NULL | | | | o------------------------------------ | | | | | o----------------------------------------- | | v v ---- ---- l |pte | |pte |o ---- ----w |pte | |pte | e ---- ----r |pte | |pte |l ---- ----e |pte | |pte |v ---- ----e . .l . . . .</pre>Note that with this scheme, the global memory granularity is 4MB. Each timeyou map a section of global virtual memory, you dedicate at least 4MB of the virtual space to global virtual memory that will be shared by all virtualmemory contexts.<p>The physical memory that holds these data structures is obtained from thesystem memory manager via memalign to insure that the memory is pagealigned. We want to protect this memory from being corrupted,so we invalidate the descriptors that we set up in the global translationthat correspond to the memory containing the translation table data structures.This creates a "chicken and the egg" paradox, in that the only way we canmodify these data structures is through virtual memory that is now invalidated,and we can't validate it because the page descriptors for that memory arein invalidated memory (confused yet?)So, you will notice that anywhere that page table descriptors (pte's)are modified, we do so by locking out interrupts, momentarily disabling the MMU, accessing the memory with its physical address, enabling the MMU, andthen re-enabling interrupts (see <b>mmuStateSet( )</b>, for example.)<p>Support for two new page attribute bits are added for PentiumPro's enhancedMMU. They are Global bit (G) and Page-level write-through/back bit (PWT).Global bit indicates a global page when set. When a page is marked global andthe page global enable (PGE) bit in register CR4 is set, the page-table orpage-directory entry for the page is not invalidated in the TLB when registerCR3 is loaded or a task switch occurs. This bit is provided to preventfrequently used pages (such as pages that contain kernel or other operatingsystem or executive code) from being flushed from the TLB.Page-level write-through/back bit (PWT) controls the write-through or write-back caching policy of individual pages or page tables. When the PWT bit isset, write-through caching is enabled for the associated page or page table.When the bit is clear, write-back caching is enabled for the associated pageand page table.Following macros are used to describe these attribute bits in the physicalmemory descriptor table sysPhysMemDesc[] in <b>sysLib.c</b>.<p> <b>VM_STATE_WBACK</b> - use write-back cache policy for the page <br> <b>VM_STATE_WBACK_NOT</b> - use write-through cache policy for the page <br> <b>VM_STATE_GLOBAL</b> - set page global bit<br> <b>VM_STATE_GLOBAL_NOT</b> - not set page global bit<p>Support for two page size (4KB and 4MB) are added also.The linear address for 4KB pages is divided into three sections:<p> Page directory entry - bits 22 through 31.<br> Page table entry - Bits 12 through 21.<br> Page offset - Bits 0 through 11.<p>The linear address for 4MB pages is divided into two sections:<p> Page directory entry - Bits 22 through 31.<br> Page offset - Bits 0 through 21.<p>These two page size is configurable by <b>VM_PAGE_SIZE</b> macro in <b>config.h</b>.<p><hr><a name="mmuPro32LibInit"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries : Routines</i></a></p></blockquote><h1>mmuPro32LibInit( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>mmuPro32LibInit( )</strong> - initialize module</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS mmuPro32LibInit ( int pageSize /* system pageSize (must be 4KB or 4MB) */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>Build a dummy translation table that will hold the page table entriesfor the global translation table. The MMU remains disabled uponcompletion.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK if no error, ERROR otherwise<p></blockquote><h4>ERRNO</h4><blockquote><p><b>S_mmuLib_INVALID_PAGE_SIZE</b></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./mmuPro32Lib.html#top">mmuPro32Lib</a></b></body></html>
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