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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/cacheR32kLib.html - generated by refgen from ../mips/cacheR32kLib.c --> <title> cacheR32kLib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.htm"><i>VxWorks API Reference : OS Libraries</i></a></p></blockquote><h1>cacheR32kLib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>cacheR32kLib</strong> - MIPS RC32364 cache management library </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><a href="./cacheR32kLib.html#cacheR32kLibInit">cacheR32kLibInit</a>( )</b> - initialize the RC32364 cache library<br><b><a href="./cacheR32kLib.html#cacheR32kMalloc">cacheR32kMalloc</a>( )</b> - allocate a cache-safe buffer, if possible<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This library contains architecture-specific cache library functions forthe MIPS IDT RC32364 architecture. <p>For general information about caching, see the manual entry for <b><a href="./cacheLib.html#top">cacheLib</a></b>.<p></blockquote><h4>INCLUDE FILES</h4><blockquote><p><b>cacheLib.h</b><p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./cacheLib.html#top">cacheLib</a></b><hr><a name="cacheR32kLibInit"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries : Routines</i></a></p></blockquote><h1>cacheR32kLibInit( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>cacheR32kLibInit( )</strong> - initialize the RC32364 cache library</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS cacheR32kLibInit ( CACHE_MODE instMode, /* instruction cache mode */ CACHE_MODE dataMode /* data cache mode */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine initializes the function pointers for the RC32364 cachelibrary. The board support package can select this cache library by assigning the function pointer <i>sysCacheLibInit</i> to<b><a href="./cacheR32kLib.html#cacheR32kLibInit">cacheR32kLibInit</a>( )</b>.<p>This routine determines the cache size and cache line sizefor the instruction and data cache automatically by readingthe CP0 configuration register. This is different than most of theother cache library initialization calls, which take the cacheand line sizes as parameters.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./cacheR32kLib.html#top">cacheR32kLib</a></b><hr><a name="cacheR32kMalloc"></a><p align=right><a href="rtnIndex.htm"><i>OS Libraries : Routines</i></a></p></blockquote><h1>cacheR32kMalloc( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>cacheR32kMalloc( )</strong> - allocate a cache-safe buffer, if possible</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void * cacheR32kMalloc ( size_t bytes )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine will attempt to return a pointer to a section of memorythat will not experience any cache coherency problems.<p></blockquote><h4>RETURNS</h4><blockquote><p>A pointer to the non-cached buffer, or NULL.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./cacheR32kLib.html#top">cacheR32kLib</a></b></body></html>⌨️ 快捷键说明
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