sysepic.c

这是WINDRIVER公司所开发的针对freescale公司最新的powerpc系列MPC8560的针对vxworks的bsp。对做powerpc嵌入式的很有用了。

    if (vector < EPIC_VEC_IN_IRQ0)    /* type EXT */
        {
        return (EPIC_EX_VEC_REG (vector - EPIC_VEC_EXT_IRQ0));
        }

    if (vector < EPIC_VEC_GT_IRQ0)    /* type IN */
        {
        return (EPIC_IN_VEC_REG (vector - EPIC_VEC_IN_IRQ0));
        }

    if (vector < EPIC_VEC_MSG_IRQ0)    /* type GT */
        {
        return (EPIC_GT_VEC_REG (vector - EPIC_VEC_GT_IRQ0));
        }

    if (vector < EPIC_VEC_IPI_IRQ0)    /* type MSG */
        {
        return (EPIC_MSG_VEC_REG (vector - EPIC_VEC_MSG_IRQ0));
        }

    if (vector < EPIC_VEC_CTRL_EXT)    /* type IPI */
        {
        return (EPIC_IPI_VEC_REG (vector - EPIC_VEC_IPI_IRQ0));
        }

    /* should not reach here */
    return ((ULONG) ERROR);
    }

/*******************************************************************************
*
* epicGetDestRegAdrs - translate a vector to destination reg address
*
* NOMANUAL
*
* RETURNS: the destination register address of the corresponding vector type
*/

ULONG epicGetDestRegAdrs
    (
    int vector
    )
    {
    if ((vector < EPIC_VEC_EXT_IRQ0) || (vector >= EPIC_VEC_CTRL_EXT))
        return ((ULONG) ERROR);

    if (vector < EPIC_VEC_IN_IRQ0)    /* type EXT */
        {
        return (EPIC_EX_DEST_REG (vector - EPIC_VEC_EXT_IRQ0));
        }

    if (vector < EPIC_VEC_GT_IRQ0)    /* type IN */
        {
        return (EPIC_IN_DEST_REG (vector - EPIC_VEC_IN_IRQ0));
        }

    if (vector < EPIC_VEC_MSG_IRQ0)    /* type GT */
        {
        return ((ULONG) ERROR);
        }

    if (vector < EPIC_VEC_IPI_IRQ0)    /* type MSG */
        {
        return (EPIC_MSG_DEST_REG (vector - EPIC_VEC_MSG_IRQ0));
        }

    if (vector < EPIC_VEC_CTRL_EXT)    /* type IPI */
        {
        return ((ULONG) ERROR);
        }

    /* should not reach here */
    return ((ULONG) ERROR);
    }

/*******************************************************************************
*
* epicSrcAddrCheck - check if the VPR address passed in is external,
*                    internal, timer, message, or IPI.
*
* NOMANUAL
* 
* RETURNS: EPIC_IN_INTERRUPT for internal interrupt sources, or
*          EPIC_EX_INTERRUPT for external ones, or
*          EPIC_GT_INTERRUPT for global timer ones, or
*          EPIC_MSG_INTERRUPT for message ones, or
*          EPIC_IPI_INTERRUPT for IPI ones, or
*          EPIC_INV_INTER_SOURCE if an invalid address was passed.
*/

LOCAL int epicSrcAddrCheck
    (
    ULONG srcAddr
    )
    {
    switch (srcAddr)
        {
	case EPIC_EX_INT0_VEC_REG:
	case EPIC_EX_INT1_VEC_REG:
	case EPIC_EX_INT2_VEC_REG:
	case EPIC_EX_INT3_VEC_REG:
	case EPIC_EX_INT4_VEC_REG:
	case EPIC_EX_INT5_VEC_REG:
	case EPIC_EX_INT6_VEC_REG:
	case EPIC_EX_INT7_VEC_REG:
	case EPIC_EX_INT8_VEC_REG:
	case EPIC_EX_INT9_VEC_REG:
	case EPIC_EX_INT10_VEC_REG:
	case EPIC_EX_INT11_VEC_REG:
            return (EPIC_EX_INTERRUPT);
	break;

	case EPIC_IN_INT0_VEC_REG:
	case EPIC_IN_INT1_VEC_REG:
	case EPIC_IN_INT2_VEC_REG:
	case EPIC_IN_INT3_VEC_REG:
	case EPIC_IN_INT4_VEC_REG:
	case EPIC_IN_INT5_VEC_REG:
	case EPIC_IN_INT6_VEC_REG:
	case EPIC_IN_INT7_VEC_REG:
	case EPIC_IN_INT8_VEC_REG:
	case EPIC_IN_INT9_VEC_REG:
	case EPIC_IN_INT10_VEC_REG:
	case EPIC_IN_INT11_VEC_REG:
	case EPIC_IN_INT12_VEC_REG:
	case EPIC_IN_INT13_VEC_REG:
	case EPIC_IN_INT14_VEC_REG:
	case EPIC_IN_INT15_VEC_REG:
	case EPIC_IN_INT16_VEC_REG:
	case EPIC_IN_INT17_VEC_REG:
	case EPIC_IN_INT18_VEC_REG:
	case EPIC_IN_INT19_VEC_REG:
	case EPIC_IN_INT20_VEC_REG:
	case EPIC_IN_INT21_VEC_REG:
	case EPIC_IN_INT22_VEC_REG:
	case EPIC_IN_INT23_VEC_REG:
	case EPIC_IN_INT24_VEC_REG:
	case EPIC_IN_INT25_VEC_REG:
	case EPIC_IN_INT26_VEC_REG:
	case EPIC_IN_INT27_VEC_REG:
	case EPIC_IN_INT28_VEC_REG:
	case EPIC_IN_INT29_VEC_REG:
	case EPIC_IN_INT30_VEC_REG:
	case EPIC_IN_INT31_VEC_REG:
            return (EPIC_IN_INTERRUPT);
	break;

	case EPIC_TM0_VEC_REG:
	case EPIC_TM1_VEC_REG:
	case EPIC_TM2_VEC_REG:
	case EPIC_TM3_VEC_REG:
            return (EPIC_GT_INTERRUPT);
	break;

	case EPIC_MSG_INT0_VEC_REG:
	case EPIC_MSG_INT1_VEC_REG:
	case EPIC_MSG_INT2_VEC_REG:
	case EPIC_MSG_INT3_VEC_REG:
            return (EPIC_MSG_INTERRUPT);
	break;

	case EPIC_IPI_0_VEC_REG:
	case EPIC_IPI_1_VEC_REG:
	case EPIC_IPI_2_VEC_REG:
	case EPIC_IPI_3_VEC_REG:
            return (EPIC_IPI_INTERRUPT);
	break;

        default:
            return (EPIC_INV_INTER_SOURCE);

        }
    }

/*******************************************************************************
*
* epicIntSourceSet - set interrupt parameters for an interrupt register
*
* This function sets the interrupt parameters for:
*     External vector/priority register (EIVPR)
*     Internal vector/priority register (IIVPR)
*     Global Timer vector/priority register (GTVPR)
*     Message vector/priority register (MIVPR)
*     IPI vector/priority register (IPIVPR)
* The interrupt parameters can only be set when the current source is not
* in-request or in-service, which is determined by the Activity bit.  This
* routine reads the Activity bit; if the value of this bit is 1 (in-request
* or in-service), it returns error; otherwise, it sets the value of the
* parameters to the register offset defined in srcAddr.
*
* inputs:  srcAddr:   Address Offset of the source interrupt register.  This
*		      routine assumes that the srcAddr passed in is an valid
*		      Source Vector Priority address.
*          polarity: Use by external & internal interrupts only.
*                    1 -  Enable active high or positive edge
*                    0 -  Enable active low or negative edge
*          sense:    Use by external interrupts only.
*                    1 -  Enable level sensitive interrupts
*                    0 -  Enable edge sensitive interrupts
*          priority: valid number 0 to 15   
*          vector:   valid number 0 - 65535 (16 bits)
*
* Errors:  EPIC_INV_INTER_SOURCE Invalid Source Address,
*          EPIC_INTER_IN_SERVICE Interrupt currently in service
*          ERROR Unknown type
*
* NOMANUAL
* 
* RETURNS: OK or one of errors above
*/

STATUS epicIntSourceSet
    (
    ULONG 	srcAddr,
    int 	polarity,
    int 	sense,
    int 	priority,
    int 	vector
    )
    {
    ULONG 	srcVal;
    ULONG	errCode;
  
    errCode = epicSrcAddrCheck(srcAddr);

    if (errCode == EPIC_INV_INTER_SOURCE)
        {
        return (errCode);
        }

    srcVal = sysEpicRegRead(srcAddr);

    switch (errCode)
        {
        case EPIC_EX_INTERRUPT:
            if (srcVal & EPIC_EIVPR_INTR_ACTIVE)
                {
                return (EPIC_INTER_IN_SERVICE);
                }
            /* mask off current settings */
            srcVal &= ~(EPIC_EIVPR_INTR_POLARITY |
                        EPIC_EIVPR_INTR_SENSE |
                        EPIC_EIVPR_PRIORITY_MSK  |
                        EPIC_EIVPR_VECTOR_MSK);
            /* set new values */
            srcVal |= (EPIC_EIVPR_POLARITY (polarity) |
                       EPIC_EIVPR_SENS (sense) |
                       EPIC_EIVPR_PRIORITY (priority) |
                       EPIC_EIVPR_VECTOR (vector));
        break;

        case EPIC_IN_INTERRUPT:
            if (srcVal & EPIC_IIVPR_INTR_ACTIVE)
                {
                return (EPIC_INTER_IN_SERVICE);
                }
            /* mask off current settings */
            srcVal &= ~(EPIC_IIVPR_INTR_POLARITY |
                        EPIC_IIVPR_PRIORITY_MSK  |
                        EPIC_IIVPR_VECTOR_MSK);
            /* set new values */
            srcVal |= (EPIC_IIVPR_POLARITY (polarity) |
                       EPIC_IIVPR_PRIORITY (priority) |
                       EPIC_IIVPR_VECTOR (vector));
        break;

        case EPIC_GT_INTERRUPT:
            if (srcVal & EPIC_GTVPR_INTR_ACTIVE)
                {
                return (EPIC_INTER_IN_SERVICE);
                }
            /* mask off current settings */
            srcVal &= ~(EPIC_GTVPR_PRIORITY_MSK  |
                        EPIC_GTVPR_VECTOR_MSK);
            /* set new values */
            srcVal |= (EPIC_GTVPR_PRIORITY (priority) |
                       EPIC_GTVPR_VECTOR (vector));
        break;

        case EPIC_MSG_INTERRUPT:
            if (srcVal & EPIC_MIVPR_INTR_ACTIVE)
                {
                return (EPIC_INTER_IN_SERVICE);
                }
            /* mask off current settings */
            srcVal &= ~(EPIC_MIVPR_PRIORITY_MSK  |
                        EPIC_MIVPR_VECTOR_MSK);
            /* set new values */
            srcVal |= (EPIC_MIVPR_PRIORITY (priority) |
                       EPIC_MIVPR_VECTOR (vector));
        break;

        case EPIC_IPI_INTERRUPT:
            if (srcVal & EPIC_IPIVPR_INTR_ACTIVE)
                {
                return (EPIC_INTER_IN_SERVICE);
                }
            /* mask off current settings */
            srcVal &= ~(EPIC_IPIVPR_PRIORITY_MSK  |
                        EPIC_IPIVPR_VECTOR_MSK);
            /* set new values */
            srcVal |= (EPIC_IPIVPR_PRIORITY (priority) |
                       EPIC_IPIVPR_VECTOR (vector));
        break;

        default:
            return (ERROR);
        }

    sysEpicRegWrite(srcAddr, srcVal);

    return (OK);
    }


/*******************************************************************************
*
* epicIntSourceGet - retrieve information of an EPIC source vector register.
*
* This function retrieves information of an epic source vector register.
* The information includes the Enable bit, the polarity, sense bits, the
* interrupt priority and interrupt vector number.
* Input:  srcAddr   - address of the source vector register
* Output: enable    - whether the interrupt is enabled
*          polarity - interrupt polarity (high or low)
*          sense    - interrupt sense (level or edge)
*          Priority - interrupt priority
*          Vector   - interrupt vector number
*
* NOMANUAL
* 
* RETURNS: OK or ERROR or EPIC_INV_INTER_SOURCE
*/

STATUS epicIntSourceGet
    (
    ULONG 	srcAddr,
    int *	pEnableMask,
    int *	pPolarity,
    int *	pSense,
    int *	pPriority,
    int *	pVector
    )
    {
    ULONG 	srcVal;
    int 	errCode;
  
    errCode = epicSrcAddrCheck (srcAddr);

    if (errCode == EPIC_INV_INTER_SOURCE)
        {
        return errCode;
        }

    srcVal = sysEpicRegRead(srcAddr);
    
    switch (errCode)
        {
        case EPIC_EX_INTERRUPT:
            *pEnableMask  = (srcVal & EPIC_EIVPR_INTR_MSK)      >> 31;
            *pPolarity    = (srcVal & EPIC_EIVPR_INTR_POLARITY) >> 23;
            *pSense       = (srcVal & EPIC_EIVPR_INTR_SENSE)    >> 22;
            *pPriority    = (srcVal & EPIC_EIVPR_PRIORITY_MSK)  >> 16;
            *pVector      = (srcVal & EPIC_EIVPR_VECTOR_MSK);
        break;

        case EPIC_IN_INTERRUPT:
            *pEnableMask  = (srcVal & EPIC_IIVPR_INTR_MSK)      >> 31;
            *pPolarity    = (srcVal & EPIC_IIVPR_INTR_POLARITY) >> 23;
            *pPriority    = (srcVal & EPIC_IIVPR_PRIORITY_MSK)  >> 16;
            *pVector      = (srcVal & EPIC_IIVPR_VECTOR_MSK);
        break;

        case EPIC_GT_INTERRUPT:
            *pEnableMask  = (srcVal & EPIC_GTVPR_INTR_MSK)      >> 31;
            *pPriority    = (srcVal & EPIC_GTVPR_PRIORITY_MSK)  >> 16;
            *pVector      = (srcVal & EPIC_GTVPR_VECTOR_MSK);
        break;

        case EPIC_MSG_INTERRUPT:
            *pEnableMask  = (srcVal & EPIC_MIVPR_INTR_MSK)      >> 31;
            *pPriority    = (srcVal & EPIC_MIVPR_PRIORITY_MSK)  >> 16;
            *pVector      = (srcVal & EPIC_MIVPR_VECTOR_MSK);
        break;

        case EPIC_IPI_INTERRUPT:
            *pEnableMask  = (srcVal & EPIC_IPIVPR_INTR_MSK)     >> 31;
            *pPriority    = (srcVal & EPIC_IPIVPR_PRIORITY_MSK) >> 16;
            *pVector      = (srcVal & EPIC_IPIVPR_VECTOR_MSK);
        break;

        default:
            return (ERROR);
        }

    return (OK);
    }

/*******************************************************************************
*
* sysEpicRegRead - read a register from the EPIC address space
*
* This function reads a register from the EPIC address space. The
* register number <regNum> is added to the offset of the EPIC base address
*
* NOMANUAL
*
* RETURNS:  the 32 bit little endian value of the register.
*/

UINT32 sysEpicRegRead
    (
    ULONG regNum
    )
    {
    UINT32 temp;

    WRS_ASM("eieio;sync");
    temp = *(ULONG *) (CCSBAR + regNum) ;
    return (temp);
    }

/*******************************************************************************
*
* sysEpicRegWrite -  write a register to the EPIC address space
*
* This function wrties a register to the EPIC address space. The
* register number <regNum> is added to the offset of the EPIC base address
* and the resulting address is loaded with <regVal>
*
* NOMANUAL
*
* RETURNS: N/A
*/

void sysEpicRegWrite
    (
    ULONG regNum,
    UINT32 regVal
    )
    {

    *(UINT32 *) (CCSBAR + regNum) = regVal;
    WRS_ASM("eieio;sync");
    return ;
    }