st79_clk.c

st公司新出的一款8位单片机st79的lib库

  * - clock-switch to LSI is on going (CKM!=SWI & SWI=LSI);
  * - LSI is clock master (CKM=LSI).
  * @param[in]  CLK_NewState new state of LSION, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_LSICmd(ENABLE);
  * @endcode
  */
void CLK_LSICmd(FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    /* Set LSION bit */
    CLK->ICKR |= CLK_ICKR_LSIEN;
  }
  else
  {
    /* Reset LSION bit */
    CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN);
  }
}

/**
  * @brief Configures the PLL clock source.
  * @par Full description:
  * This function must be used only when the PLL is disabled (PLLON = 0).\n
  * CLK_SpreadControl parameter specifies the spread type in SSCG mode.
  * This parameter can be set of the following values:\n
  * - CLK_PLLCENTERSPREADTYPE: center-spread;\n
  * - CLK_PLLDOWNSPREADTYPE:   down-spread.\n
  * 
  * CLK_SSCGMode parameter actives/deactives the SSCG mode.
  * This parameter can be set of the following values:\n
  * - CLK_PLL_SSCG_ON:  SSCG activated (PLL can generate
  * only TRIANGULAR modulation profile at the PLL output);\n
  * - CLK_PLL_SSCG_OFF: SSCG deactivated.
  * 
  * CLK_Bypass parameter selects PLL/3 or bypassed clock.
  * This parameter can be set of the following values:
  * - CLK_PLL_REFFREQ: PLL reference frequency is taken;
  * - CLK_PLL_DIV3: PLL frequency divide by three is selected.
  * 
  * CLK_Reference parameter selects HSI or HSE as input reference frequency.
  * This parameter can be set of the following values:\n
  * - CLK_PLL_HSE: HSE is selected as PLL reference frequency;\n
  * - CLK_PLL_HSI: HSI is selected as PLL reference frequenc.\n
  * @param[in] CLK_SpreadControl parameter select spread type in SSCG mode.
  * @param[in] CLK_SSCGMode parameter select SSCG Mode.
  * @param[in] CLK_Bypass parameter select the clock mode (PLL or byoassed).
  * @param[in] CLK_Reference parameter select the input reference frequency (HSI or HSE).
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_PLLConfig(CLK_PLLCENTERSPREADTYPE, CLK_PLL_SSCG_ON, CLK_PLL_REFFREQ, CLK_PLL_HSE);
  * @endcode
  */
void CLK_PLLConfig(CLK_SpreadControl_TypeDef CLK_SpreadControl, CLK_SSCGClockMode_TypeDef CLK_SSCGMode, CLK_ClockBypass_TypeDef CLK_Bypass, CLK_Reference_TypeDef CLK_Reference)
{

  /* Clear SPREAD_CONTROL, SSCG_CONTROL, BYPASS and PLLREF bits */
  CLK->PLLR &= (u8)(~(CLK_PLLR_SPREADCTL | CLK_PLLR_SSCGCTL | CLK_PLLR_BYPASS | CLK_PLLR_PLLREF));

  /* Set the PLL configuration bits */
  CLK->PLLR |= (u8)((u8)CLK_SpreadControl | (u8)CLK_SSCGMode | (u8)CLK_Bypass | (u8)CLK_Reference);

}

/**
  * @brief Enables or disables the Phase Locked Loop (PLL).
  * @par Full description:
  * CLK_NewState parameter set the PLLON bit and this
  * can be set both by software and hardware.\n
  * PLLON is set and kept asserted by HW right of priority in such cases:
  * - PLL selected by active CCO (CCOBSY=1b & CCOSEL=Dh,Eh);
  * - clock-switch to PLL is on going (CKM!=SWI & SWI=PLL);
  * - PLL is clock master (CKM=PLL).
  * 
  * PLLON is cleared and kept de-asserted by HW right of priority
  * in such cases:
  * - CSSD=1b.
  * 
  * PLLON=1b also switches-on the PLL reference oscillator:HSION
  * or HSEON bit is automatically set according to PLLREF.
  * @param[in] CLK_NewState new state of LSION, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_PLLCmd(ENABLE)
  * @endcode
  */
void CLK_PLLCmd(FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    /* Set PLLON bit (and HSION or HSEON bit depending on PLLREF bit) */
    CLK->PLLR |= CLK_PLLR_PLLON;
  }
  else
  {
    /* Reset PLLON bit */
    CLK->PLLR &= (u8)(~CLK_PLLR_PLLON);
  }
}


/**
  * @brief Returns the clock source used as system clock.
  * @par Full description:
  * The return value of this function is the clock source used as system clock.
  * The returned value can be one of the following:
  * - CLK_SYSCLKSOURCE_HSI: HSI used as system clock;
  * - CLK_SYSCLKSOURCE_LSI: LSI used as system clock;
  * - CLK_SYSCLKSOURCE_HSE: HSE used as system clock;
  * - CLK_SYSCLKSOURCE_PLLCLK: PLL used as system clock;
  * - other values: HSI used as system clock (CKM corruption only).
  * @par Parameters:
  * None
  * @retval u8 Clock source used.
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * u8 val;
  * val = CLK_GetSYSCLKSource();
  * if (val == CLK_SYSCLKSOURCE_PLLCLK) { ... }
  * @endcode
  */
CLK_ClockSources CLK_GetSYSCLKSource(void)
{
  return((CLK_ClockSources)CLK->CMSR);
}


/**
  * @brief Reset the SWBSY flag (SWIC Reister)
  * @par Full description:
  * This function reset SWBSY fleg in order to reset clock switch operations (target
  * oscillator is broken, stabilization is longing too much, etc.)
  * by restoring SWI=CKM. If at the same time software attempts to
  * set SWEN and clear SWBSY, SWBSY action takes precedence.
  * @par Parameters:
  * None
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_SYSCLKEmergencyClear();
  * @endcode
  */
void CLK_SYSCLKEmergencyClear(void)
{
  CLK->SWCR &= (u8)(~CLK_SWCR_SWBSY);
}

/**
  * @brief  Enables or disables the specified CLK interrupts.
  * @par Full description:
  * The CLK_IT parameter specifies the CLK interrupt sources to be enabled
  * or disabled.
  * This parameter can be any combination of the following values:
  * - CLK_IT_SWIE: Clock Switch Interrupt;
  * - CLK_IT_CSSDIE: Clock Security System Detection interrupt.
  * The CLK_NewState parameter specified state of the specified CLK interrupts.
  * @param[in] CLK_IT This parameter specifies the interrupt sources.
  * @param[in] CLK_NewState New state of LSION, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_ITConfig(CLK_IT_SWIE, ENABLE);
  * @endcode
  */
void CLK_ITConfig(CLK_ClockInterruptSource_TypeDef CLK_IT, FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    if (CLK_IT == CLK_IT_SWIE)
    {
      /* Enable the clock switch interrupt */
      CLK->SWCR |= CLK_SWCR_IEN;
    }
    else if (CLK_IT == CLK_IT_CSSDIE)
    {
      /* Enable the clock security system detection interrupt */
      CLK->CSSR |= CLK_CSSR_CSSDIE;
    }
    else
    {
      /* Enable both interrupt */
      CLK->SWCR |= ((u8)(CLK_SWCR_IEN));
      CLK->CSSR  |= (u8)CLK_CSSR_CSSDIE;
    }
  }
  else
  {
    if (CLK_IT == CLK_IT_SWIE)
    {
      /* Disable the clock switch interrupt */
      CLK->SWCR &= (u8)(~CLK_SWCR_IEN);
    }
    else if (CLK_IT == CLK_IT_CSSDIE)
    {
      /* Disable the clock security system detection interrupt */
      CLK->CSSR &= (u8)(~CLK_CSSR_CSSDIE);
    }
    else
    {
      /* Disable both interrupt */
      CLK->SWCR &= (u8)(~CLK_SWCR_IEN);
      CLK->CSSR  &= (u8)(~CLK_CSSR_CSSDIE);
    }
  }
}


/**
  * @brief This function returns the frequencies of different on chip clocks.
  * @par Full description:
  * CLK_Clocks parameter is a pointer to CLK_Clocks_TypeDef structure which
  * will hold the clocks frequencies.
  * @param[out] CLK_Clocks pointer to CLK_Clocks_TypeDef structure,
  * this structure contain two fields, CLK_SYSCLK_Frequency, CLK_ADCCLK_Frequency.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * #define Frequency xxxx
  * CLK_Clocks_TypeDef *Clocks;
  * CLK_GetClocksFreq(&Clocks);
  * if (Clocks->CLK_SYSCLK_Frequency == Frequency) { ... }
  * @endcode
  */
void CLK_GetClocksFreq(CLK_Clocks_TypeDef* CLK_Clocks)
{

  u8 tmp = 0, tmp2 = 0, pllsource = 0, presc = 0;

  /* Get CLK source. */
  tmp = CLK->CMSR;

  if (tmp == (u8)CLK_SYSCLKSOURCE_HSI)
  {
    tmp2 = CLK->CKDIVR & CLK_CKDIVR_HSIDIV;
    tmp2 = tmp2 >> 3;
    presc = HSIDivFactor[tmp2];
    CLK_Clocks->CLK_SYSCLK_Frequency = HSI_VALUE / presc;
  }
  else if (tmp == (u8)CLK_SYSCLKSOURCE_LSI)
  {
    CLK_Clocks->CLK_SYSCLK_Frequency = LSI_VALUE;
  }
  else if (tmp == (u8)CLK_SYSCLKSOURCE_HSE)
  {
    CLK_Clocks->CLK_SYSCLK_Frequency = HSE_Value;
  }
  else if (tmp == (u8)CLK_SYSCLKSOURCE_PLLCLK)
  {
    pllsource = (u8)CLK_GetFlagStatus(CLK_FLAG_PLLREF_NUM, CLK_FLAG_PLLREF_POS);
    presc = (CLK_GetFlagStatus(CLK_FLAG_BYPASS_NUM, CLK_FLAG_BYPASS_POS) ? 1 : 3);
    if (pllsource == 0x00)
    {/* HSI oscillator selected as PLL clock entry and divided by 1 (Bypass = 1) or by 3 (Bypass = 0) */
      tmp2 = CLK->CKDIVR & CLK_CKDIVR_HSIDIV;
      tmp2 = tmp2 >> 3;
      presc *= HSIDivFactor[tmp2];
      CLK_Clocks->CLK_SYSCLK_Frequency = HSI_VALUE / presc;
    }
    else
    {/* HSE oscillator selected as PLL clock entry and divided by 1 (Bypass = 1) or by 3 (Bypass = 0) */
      CLK_Clocks->CLK_SYSCLK_Frequency = HSE_Value / presc;
    }
  }
  else
  {
    tmp2 = CLK->CKDIVR & CLK_CKDIVR_HSIDIV;
    tmp2 = tmp2 >> 3;
    presc = HSIDivFactor[tmp2];
    CLK_Clocks->CLK_SYSCLK_Frequency = HSI_VALUE / presc;
  }
  /* Compute ADCCLK clocks frequencies ----------------*/
  /* Get ADCCLK prescaler */
  tmp = ADC->CFGR1 & ADC_CFG1_ADCPRE_Set_Mask;
  tmp = tmp >> 1;
  presc = ADCPrescTable[tmp];

  /* ADCCLK clock frequency */
  CLK_Clocks->CLK_ADCCLK_Frequency = CLK_Clocks->CLK_SYSCLK_Frequency / presc;

}


/**
  * @brief  Enables or disables the specified CLK interrupts.
  * @par Full description:
  * The CLK_PCKEN_1_Periph parameter specifies the PCKEN_1 peripheral to gates its clock.
  * This parameter can be any combination of the following values:
  * - CLK_PCKEN1PERIPH_I2C: I2C peripheral;
  * - CLK_PCKEN1PERIPH_SPI: SPI peripheral;
  * - CLK_PCKEN1PERIPH_SCI1: SCI1 peripheral;
  * - CLK_PCKEN1PERIPH_SCI2: SCI2 peripheral;
  * - CLK_PCKEN1PERIPH_TIMER4: TIMER4 peripheral;
  * - CLK_PCKEN1PERIPH_TIMER1: TIMER1 peripheral;
  * - CLK_PCKEN1PERIPH_TIMER2: TIMER2 peripheral;
  * - CLK_PCKEN1PERIPH_TIMER3: TIMER3 peripheral;
  * - CLK_PCKEN1PERIPH_ALL: ALL PCKEN_1 peripherals.
  * 
  * The CLK_NewState parameter specified the new state of the specified peripheral clock.
  * @param[in] CLK_PCKEN_1_Periph this parameter specifies the PCKEN_1 peripheral to gates its clock.
  * @param[in] CLK_NewState new state of specified peripheral clock, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_PCKEN1PeriphClockCmd(CLK_PCKEN1PERIPH_TIMER4, ENABLE);
  * @endcode
  */
void CLK_PCKEN1PeriphClockCmd(CLK_Peripherals1ClockEnable_TypeDef CLK_PCKEN_1_Periph, FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    CLK->PCKEN1R |= (u8)CLK_PCKEN_1_Periph;
  }
  else
  {
    CLK->PCKEN1R &= (u8)(~CLK_PCKEN_1_Periph);
  }
}

/**
  * @brief  Enables or disables the specified CLK interrupts.
  * @par Full description:
  * The CLK_PCKEN_2_Periph parameter specifies the PCKEN_1 peripheral to gates its clock.
  * This parameter can be any combination of the following values:
  * - CLK_PCKEN2PERIPH_AWU: AWU peripheral;
  * - CLK_PCKEN2PERIPH_ADC: ADC peripheral;
  * - CLK_PCKEN2PERIPH_CAN: CAN peripheral;
  * - CLK_PCKEN2PERIPH_ALL: ALL PCKEN_2 peripherals.
  * 
  * The CLK_NewState parameter specified the new state of the specified peripheral clock.
  * @param[in] CLK_PCKEN_2_Periph this parameter specifies the PCKEN_1 peripheral to gates its clock.
  * @param[in] CLK_NewState new state of specified peripheral clock, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_PCKEN2PeriphClockCmd(CLK_PCKEN2PERIPH_ADC, ENABLE);
  * @endcode
  */
void CLK_PCKEN2PeriphClockCmd(CLK_Peripherals2ClockEnable_TypeDef CLK_PCKEN_2_Periph, FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    CLK->PCKEN2R |= (u8)CLK_PCKEN_2_Periph;
  }
  else
  {
    CLK->PCKEN2R &= (u8)(~CLK_PCKEN_2_Periph);
  }
}

/**
  * @brief Enables the Clock Security System.
  * @par Full description:
  * CLK_NewState parameter set the CSSON bit.
  * Once it has been set by SW, it can be cleared only by external reset.
  * @param[in] CLK_NewState new state of Clock Security system, value accepted ENABLE, DISABLE.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_ClockSecuritySystemCmd(ENABLE)
  * @endcode
  */
void CLK_ClockSecuritySystemCmd(FunctionalState CLK_NewState)
{
  if (CLK_NewState != DISABLE)
  {
    /* Set CSSON bit (HSE is being monitored by clock detector) */
    CLK->CSSR |= CLK_CCOR_CCOEN;
  }
}

/**
  * @brief Selects the configurable clock output.
  * @par Full description:
  * The CLK_CCO parameter specifies the clock source to cco_ck output,
  * it can be set with one of the following values:
  * - CLK_CCOSEL_HSIDIV: HSI/HSIDIV oscillator clock selected;
  * - CLK_CCOSEL_LSI: LSI oscillator clock selected;
  * - CLK_CCOSEL_HSE: HSE oscillator clock selected;
  * - CLK_CCOSEL_PLL: PLL oscillator clock selected;
  * - CLK_CCOSEL_CPU: CPU clock selected;
  * - CLK_CCOSEL_CPU_DIV2: CPU/2 clock selected;
  * - CLK_CCOSEL_CPU_DIV4: CPU/4 clock selected;
  * - CLK_CCOSEL_CPU_DIV8: CPU/8 clock selected;
  * - CLK_CCOSEL_CPU_DIV16: CPU/16 clock selected;
  * - CLK_CCOSEL_CPU_DIV32: CPU/32 clock selected;
  * - CLK_CCOSEL_CPU_DIV64: CPU/64 clock selected;
  * - CLK_CCOSEL_HSI: HSI oscillator clock selected;
  * - CLK_CCOSEL_CKM: CKM oscillator clock selected;
  * - CLK_CCOSEL_OTHERS: CPU clock selected.
  * @param[in] CLK_CCO specifies the clock source.
  * @retval void None
  * @par Required preconditions:
  * None
  * @par Called functions:
  * None
  * @par Examples:
  * This example shows how to call the function:
  * @code
  * CLK_CCOConfig(CLK_CCOSEL_CPU_DIV32);
  * @endcode
  */
ErrorStatus CLK_CCOConfig(CLK_ClockSourceOutput_TypeDef CLK_CCO)
{
  ErrorStatus Swif = ERROR;
  u16 DownConter = CLK_TIMEOUT;
  /* Clears of the CCO type bits part */
  CLK->CCOR &= (u8)(~CLK_CCOR_CCOSEL);
  /* Selects the source provided on cco_ck output */
  CLK->CCOR |= CLK_CCO;
  while (((CLK->CCOR & CLK_CCOR_CCORDY) && (DownConter != 0)))
  {