st79_clk.h

st公司新出的一款8位单片机st79的lib库

/**
  ******************************************************************************
  * @file st79_clk.h
  * @brief This file contains all functions prototype and macros for the CLK peripheral.
  * @author STMicroelectronics - MCD & APG Car Body Application Labs
  * @version V0.01
  * @date 04-JUL-2007
  ******************************************************************************
  *
  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2007 STMicroelectronics</center></h2>
  * @image html logo.bmp
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ST79_CLK_H
#define __ST79_CLK_H

/* Includes ------------------------------------------------------------------*/
/* Contains the description of all ST79 hardware registers */
#include "st79_map.h"

/* Exported types ------------------------------------------------------------*/

/** @addtogroup CLK_Exported_Types
  * @{
  */

/* CLK Clocks structure definition */
typedef struct
{
  u32 CLK_SYSCLK_Frequency; /*!< System Clock Frequency */
  u32 CLK_ADCCLK_Frequency; /*!< ADC Clock Frequency */
}
CLK_Clocks_TypeDef;

/* Switch Mode Auto, Manual. */
typedef enum {
  CLK_SWITCHMODE_MANUAL = (u8)0x00,
  CLK_SWITCHMODE_AUTO   = (u8)0x01
} CLK_SwitchMode_TypeDef;

/* Current Clock State. */
typedef enum {
  CLK_CURRENT_CLOCK_DISABLE = (u8)0x00,
  CLK_CURRENT_CLOCK_ENABLE  = (u8)0x01
} CLK_CurrentClockState_TypeDef;

typedef enum {
  CLK_CSSR_CSSON_DIE = (u8)0x05, /*!< Enable CSS with detection interrupt */
  CLK_CSSR_CSSON     = (u8)0x01, /*!< Enable CSS without detection interrupt */
  CLK_CSSR_CSSOFF    = (u8)0x00  /*!< Leave CSS desactivated (to be used in CLK_Init() function) */
} CLK_CSSConfig_TypeDef;

/** CLK clock type possible values */
typedef enum {
  CLK_HSI     = (u8)0x01, /*!< HSI selected */
  CLK_LSI     = (u8)0x02, /*!< LSI selected */
  CLK_HSE     = (u8)0x03, /*!< HSE selected */
  CLK_HSE_EXT = (u8)0x04  /*!< HSE user ext selected */
} CLK_NewClock_TypeDef;

/** CLK HSE  possible startup times */
typedef enum {
  CLK_NO_STARTUP          = (u8)0x00, /*!< No startup required */
  CLK_HSE1_OR_LSE4096     = (u8)0xE1, /*!< HSE crystal oscillator stabilization time: 1 cycle */
  CLK_HSE16_OR_LSE8192    = (u8)0xD2, /*!< HSE crystal oscillator stabilization time: 16 cycles. */
  CLK_HSE256_OR_LSE16384  = (u8)0xB4, /*!< HSE crystal oscillator stabilization time: 256 cycles. */
  CLK_HSE4096_OR_LSE32768 = (u8)0x78  /*!< HSE crystal oscillator stabilization time: 4096 cycles. */
} CLK_StartupTime_TypeDef;

/** CLK HSI Calibration Value. */
typedef enum {
  CLK_HSI_CALIB_VALUE_0   = (u8)0x00, /*!< HSI Calibtation Value 0 */
  CLK_HSI_CALIB_VALUE_1   = (u8)0x01, /*!< HSI Calibtation Value 1 */
  CLK_HSI_CALIB_VALUE_2   = (u8)0x02, /*!< HSI Calibtation Value 2 */
  CLK_HSI_CALIB_VALUE_3   = (u8)0x03, /*!< HSI Calibtation Value 3 */
  CLK_HSI_CALIB_VALUE_4   = (u8)0x04, /*!< HSI Calibtation Value 4 */
  CLK_HSI_CALIB_VALUE_5   = (u8)0x05, /*!< HSI Calibtation Value 5 */
  CLK_HSI_CALIB_VALUE_6   = (u8)0x06, /*!< HSI Calibtation Value 6 */
  CLK_HSI_CALIB_VALUE_7   = (u8)0x07, /*!< HSI Calibtation Value 7 */
  CLK_HSI_CALIB_VALUE_8   = (u8)0x08, /*!< HSI Calibtation Value 8 */
  CLK_HSI_CALIB_VALUE_9   = (u8)0x09, /*!< HSI Calibtation Value 9 */
  CLK_HSI_CALIB_VALUE_10  = (u8)0x0A, /*!< HSI Calibtation Value 10 */
  CLK_HSI_CALIB_VALUE_11  = (u8)0x0B, /*!< HSI Calibtation Value 11 */
  CLK_HSI_CALIB_VALUE_12  = (u8)0x0C, /*!< HSI Calibtation Value 12 */
  CLK_HSI_CALIB_VALUE_13  = (u8)0x0D, /*!< HSI Calibtation Value 13 */
  CLK_HSI_CALIB_VALUE_14  = (u8)0x0E, /*!< HSI Calibtation Value 14 */
  CLK_HSI_CALIB_VALUE_15  = (u8)0x0F  /*!< HSI Calibtation Value 15 */
} CLK_HSICalibrationValue_TypeDef;

/** CLK  Clock Output. */
typedef enum {
  CLK_CCOSEL_HSIDIV    = (u8)0x00, /*!< Clock Output HSIDIV */
  CLK_CCOSEL_LSI       = (u8)0x02, /*!< Clock Output LSI */
  CLK_CCOSEL_HSE       = (u8)0x04, /*!< Clock Output HSE */
  CLK_CCOSEL_PLL       = (u8)0x06, /*!< Clock Output PLL */
  CLK_CCOSEL_CPU       = (u8)0x08, /*!< Clock Output CPU */
  CLK_CCOSEL_CPU_DIV2  = (u8)0x0A, /*!< Clock Output CPU/2 */
  CLK_CCOSEL_CPU_DIV4  = (u8)0x0C, /*!< Clock Output CPU/4 */
  CLK_CCOSEL_CPU_DIV8  = (u8)0x0E, /*!< Clock Output CPU/8 */
  CLK_CCOSEL_CPU_DIV16 = (u8)0x10, /*!< Clock Output CPU/16 */
  CLK_CCOSEL_CPU_DIV32 = (u8)0x12, /*!< Clock Output CPU/32 */
  CLK_CCOSEL_CPU_DIV64 = (u8)0x14, /*!< Clock Output CPU/64 */
  CLK_CCOSEL_HSI       = (u8)0x16, /*!< Clock Output HSI */
  CLK_CCOSEL_CKM       = (u8)0x18, /*!< Clock Output CKM */
  CLK_CCOSEL_OTHERS    = (u8)0x1A  /*!< Clock Output OTHER */
} CLK_ClockSourceOutput_TypeDef;

/** CLK Enable peripheral PCKEN1 */
typedef enum {
  CLK_PCKEN1PERIPH_I2C    = (u8)0x01, /*!< Peripheral Clock Enable 1, I2C */
  CLK_PCKEN1PERIPH_SPI    = (u8)0x02, /*!< Peripheral Clock Enable 1, SPI */
  CLK_PCKEN1PERIPH_SCI1   = (u8)0x04, /*!< Peripheral Clock Enable 1, SCI1 */
  CLK_PCKEN1PERIPH_SCI2   = (u8)0x08, /*!< Peripheral Clock Enable 1, SCI2 */
  CLK_PCKEN1PERIPH_TIMER4 = (u8)0x10, /*!< Peripheral Clock Enable 1, Timer4 */
  CLK_PCKEN1PERIPH_TIMER1 = (u8)0x20, /*!< Peripheral Clock Enable 1, Timer1 */
  CLK_PCKEN1PERIPH_TIMER2 = (u8)0x40, /*!< Peripheral Clock Enable 1, Timer2 */
  CLK_PCKEN1PERIPH_TIMER3 = (u8)0x80, /*!< Peripheral Clock Enable 1, Timer3 */
  CLK_PCKEN1PERIPH_ALL    = (u8)0xFF  /*!< Peripheral Clock Enable 1, ALL */
} CLK_Peripherals1ClockEnable_TypeDef;

/** CLK Enable peripheral PCKEN2 */
typedef enum {
  CLK_PCKEN2PERIPH_AWU = (u8)0x04, /*!< Peripheral Clock Enable 2, AWU */
  CLK_PCKEN2PERIPH_ADC = (u8)0x08, /*!< Peripheral Clock Enable 2, ADC */
  CLK_PCKEN2PERIPH_CAN = (u8)0x80, /*!< Peripheral Clock Enable 2, CAN */
  CLK_PCKEN2PERIPH_ALL = (u8)0x8C  /*!< Peripheral Clock Enable 2, ALL */
} CLK_Peripherals2ClockEnable_TypeDef;

/** CLK HSE stabilization time */
typedef enum {
  CLK_HSETB_CYCLES_RESET = (u8)0x00, /*!< HSE Stabilization time, Cycles Reset */
  CLK_HSETB_CYCLES_1     = (u8)0xE1, /*!< HSE Stabilization time, Cycles 1 */
  CLK_HSETB_CYCLES_16    = (u8)0xD2, /*!< HSE Stabilization time, Cycles 16 */
  CLK_HSETB_CYCLES_256   = (u8)0x84, /*!< HSE Stabilization time, Cycles 256 */
  CLK_HSETB_CYCLES_4096  = (u8)0x78  /*!< HSE Stabilization time, Cycles 4096 */
} CLK_StabilizationTime_TypeDef;

/** CLK Flag Number. */
typedef enum {
  CLK_FLAG_ACTHALT_NUM        = (u8)0x00, /*!< CLK Flag number */
  CLK_FLAG_LSIRDY_NUM         = (u8)0x01, /*!< CLK Flag number */
  CLK_FLAG_FASTHALTWAKEUP_NUM = (u8)0x02, /*!< CLK Flag number */
  CLK_FLAG_HSIRDY_NUM         = (u8)0x03, /*!< CLK Flag number */
  CLK_FLAG_HSERDY_NUM         = (u8)0x04, /*!< CLK Flag number */
  CLK_FLAG_PLLRDY_NUM         = (u8)0x05, /*!< CLK Flag number */
  CLK_FLAG_BYPASS_NUM         = (u8)0x06, /*!< CLK Flag number */
  CLK_FLAG_PLLREF_NUM         = (u8)0x07, /*!< CLK Flag number */
  CLK_FLAG_SWIF_NUM           = (u8)0x08, /*!< CLK Flag number */
  CLK_FLAG_SWBSY_NUM          = (u8)0x09, /*!< CLK Flag number */
  CLK_FLAG_CSSD_NUM           = (u8)0x0A, /*!< CLK Flag number */
  CLK_FLAG_AUX_NUM            = (u8)0x0B, /*!< CLK Flag number */
  CLK_FLAG_CCOBSY_NUM         = (u8)0x0C, /*!< CLK Flag number */
  CLK_FLAG_CCORDY_NUM         = (u8)0x0D  /*!< CLK Flag number */
} CLK_ClockFlagNumber_TypeDef;

/** CLK Flag Position. */
typedef enum {
  CLK_FLAG_ACTHALT_POS        = (u8)0x20, /*!< CLK Flag position */
  CLK_FLAG_LSIRDY_POS         = (u8)0x10, /*!< CLK Flag position */
  CLK_FLAG_FASTHALTWAKEUP_POS = (u8)0x04, /*!< CLK Flag position */
  CLK_FLAG_HSIRDY_POS         = (u8)0x02, /*!< CLK Flag position */
  CLK_FLAG_HSERDY_POS         = (u8)0x02, /*!< CLK Flag position */
  CLK_FLAG_PLLRDY_POS         = (u8)0x02, /*!< CLK Flag position */