📄 f06x_adc2_externalinput_mux.lst
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195 // main() Routine
196 //-----------------------------------------------------------------------------
197
198 void main (void)
199 {
200 1
201 1 unsigned char i;
202 1 long measurement; // measured voltage in mV
203 1
204 1 WDTCN = 0xde; // Disable watchdog timer
205 1 WDTCN = 0xad;
206 1
207 1 OSCILLATOR_Init (); // Initialize oscillator
208 1 PORT_Init (); // Initialize crossbar and GPIO
209 1 UART1_Init (); // Initialize UART1
210 1
211 1 TIMER2_Init (); // Initialize Timer2 to overflow at 1 mS
212 1
213 1 ADC2_Init (); // Init ADC
214 1
215 1 SFRPAGE = ADC2_PAGE;
216 1 AD2EN = 1; // Enable ADC
217 1
218 1 EA = 1; // Enable global interrupts
219 1
220 1 while (1)
221 1 {
222 2 EA = 0; // Disable interrupts
223 2
224 2 SFRPAGE = UART1_PAGE;
225 2 printf("\f");
226 2 for(i=0; i<ANALOG_INPUTS; i++)
227 2 {
228 3 // The 10-bit ADC value is averaged across INT_DEC measurements.
229 3 // The result is then stored in Result, and is right-justified
230 3 // The measured voltage applied to AIN 2.1 is then:
231 3 //
232 3 // Vref (mV)
233 3 // measurement (mV) = --------------- * Result (bits)
234 3 // (2^10)-1 (bits)
235 3
236 3 measurement = Result[i] * 2430 / 1023;
237 3 printf("AIN0.%bu voltage: %ld\tmV\n",i,measurement);
238 3 }
239 2 EA = 1; // Re-enable interrupts
240 2 Wait_MS(SAMPLE_DELAY); // Wait before displaying new values
241 2 }
C51 COMPILER V8.08 F06X_ADC2_EXTERNALINPUT_MUX 02/14/2008 15:32:09 PAGE 5
242 1 }
243 //-----------------------------------------------------------------------------
244 // Initialization Subroutines
245 //-----------------------------------------------------------------------------
246
247 //-----------------------------------------------------------------------------
248 // SYSCLK_Init
249 //-----------------------------------------------------------------------------
250 //
251 // Return Value : None
252 // Parameters : None
253 //
254 // This routine initializes the system clock to use the internal oscillator
255 // at 24.5 MHz.
256 //
257 //-----------------------------------------------------------------------------
258 void OSCILLATOR_Init (void)
259 {
260 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
261 1
262 1 SFRPAGE = CONFIG_PAGE; // set SFR page
263 1
264 1 OSCICN = 0x83; // set internal oscillator to run
265 1 // at its maximum frequency
266 1
267 1 CLKSEL = 0x00; // Select the internal osc. as
268 1 // the SYSCLK source
269 1
270 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
271 1 }
272
273
274 //-----------------------------------------------------------------------------
275 // PORT_Init
276 //-----------------------------------------------------------------------------
277 //
278 // Return Value : None
279 // Parameters : None
280 //
281 // This routine configures the crossbar and GPIO ports.
282 //
283 //-----------------------------------------------------------------------------
284 void PORT_Init (void)
285 {
286 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
287 1
288 1 SFRPAGE = CONFIG_PAGE; // set SFR page
289 1
290 1 XBR0 = 0x00;
291 1 XBR1 = 0x00;
292 1 XBR2 = 0x44; // Enable crossbar and weak pull-up
293 1 // Enable UART1
294 1
295 1 P0MDOUT |= 0x01; // Set TX1 pin to push-pull
296 1 P1MDOUT |= 0x40; // Set P1.6(LED) to push-pull
297 1
298 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
299 1 }
300
301 //-----------------------------------------------------------------------------
302 // UART1_Init
303 //-----------------------------------------------------------------------------
C51 COMPILER V8.08 F06X_ADC2_EXTERNALINPUT_MUX 02/14/2008 15:32:09 PAGE 6
304 //
305 // Return Value : None
306 // Parameters : None
307 //
308 // Configure the UART1 using Timer1, for <baudrate> and 8-N-1.
309 //
310 //-----------------------------------------------------------------------------
311 void UART1_Init (void)
312 {
313 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
314 1
315 1 SFRPAGE = UART1_PAGE;
316 1 SCON1 = 0x10; // SCON1: mode 0, 8-bit UART, enable RX
317 1
318 1 SFRPAGE = TIMER01_PAGE;
319 1 TMOD &= ~0xF0;
320 1 TMOD |= 0x20; // TMOD: timer 1, mode 2, 8-bit reload
321 1
322 1
323 1 if (SYSCLK/BAUDRATE/2/256 < 1) {
324 2 TH1 = -(SYSCLK/BAUDRATE/2);
325 2 CKCON |= 0x10; // T1M = 1; SCA1:0 = xx
326 2 } else if (SYSCLK/BAUDRATE/2/256 < 4) {
327 2 TH1 = -(SYSCLK/BAUDRATE/2/4);
328 2 CKCON &= ~0x13; // Clear all T1 related bits
329 2 CKCON |= 0x01; // T1M = 0; SCA1:0 = 01
330 2 } else if (SYSCLK/BAUDRATE/2/256 < 12) {
331 2 TH1 = -(SYSCLK/BAUDRATE/2/12);
332 2 CKCON &= ~0x13; // T1M = 0; SCA1:0 = 00
333 2 } else {
334 2 TH1 = -(SYSCLK/BAUDRATE/2/48);
335 2 CKCON &= ~0x13; // Clear all T1 related bits
336 2 CKCON |= 0x02; // T1M = 0; SCA1:0 = 10
337 2 }
338 1
339 1 TL1 = TH1; // initialize Timer1
340 1 TR1 = 1; // start Timer1
341 1
342 1 SFRPAGE = UART1_PAGE;
343 1 TI1 = 1; // Indicate TX1 ready
344 1
345 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
346 1
347 1 }
348
349 //-----------------------------------------------------------------------------
350 // ADC2_Init
351 //-----------------------------------------------------------------------------
352 //
353 // Return Value : None
354 // Parameters : None
355 //
356 // Configure ADC2 to use Timer2 overflows as conversion source, to
357 // generate an interrupt on conversion complete, and to use left-justified
358 // output mode. Enables ADC end of conversion interrupt. Leaves ADC disabled.
359 //
360 //-----------------------------------------------------------------------------
361 void ADC2_Init (void)
362 {
363 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
364 1
365 1 SFRPAGE = ADC2_PAGE;
C51 COMPILER V8.08 F06X_ADC2_EXTERNALINPUT_MUX 02/14/2008 15:32:09 PAGE 7
366 1
367 1 ADC2CN = 0x0C; // ADC2 disabled; normal tracking
368 1 // mode; ADC2 conversions are initiated
369 1 // on overflow of Timer2; ADC2 data is
370 1 // right-justified, low power tracking
371 1 // mode
372 1
373 1 REF2CN = 0x03; // Enable on-chip VREF and output buffer
374 1
375 1 AMX2CF = 0x00; // AIN inputs are single-ended (default)
376 1
377 1 AMX2SL = 0x00; // Select AIN2.0 pin as ADC mux input
378 1 // ISR will change this to step through
379 1 // inputs
380 1
381 1 ADC2CF = ((SYSCLK/SAR_CLK)-1) << 2; // ADC conversion clock = 2.5MHz
382 1 ADC2CF |= 0x00; // PGA gain = 1 (default)
383 1
384 1 EIE2 |= 0x10; // enable ADC interrupts
385 1
386 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
387 1 }
388
389 //-----------------------------------------------------------------------------
390 // TIMER2_Init
391 //-----------------------------------------------------------------------------
392 //
393 // Return Value : None
394 // Parameters : None
395 //
396 // Configure Timer2 to auto-reload at 20uS rate using SYSCLK as its timebase
397 //
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