📄 f06x_spi0_master.lst
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258 1
259 1 SFRPAGE = CONFIG_PAGE; // Switch to the necessary SFRPAGE
260 1
261 1 OSCICN = 0x83; // Set the internal oscillator to
262 1 // 24.5 MHz
263 1
264 1 SFRPAGE = SFRPAGE_save; // Restore the SFRPAGE
265 1 }
266
267 //-----------------------------------------------------------------------------
268 // Port_Init
269 //-----------------------------------------------------------------------------
270 //
271 // Return Value : None
272 // Parameters : None
273 //
274 // This function configures the crossbar and GPIO ports.
275 //
276 // P0.0 - SCK (SPI0), Push-Pull, Digital
277 // P0.1 - MISO (SPI0), Open-Drain, Digital
278 // P0.2 - MOSI (SPI0), Push-Pull, Digital
279 // P0.3 - NSS (SPI0), Push-Pull, Digital
280 //
281 // P1.6 - LED, Push-Pull, Digital (LED D3 on Target Board)
282 //
283 //-----------------------------------------------------------------------------
284 void PORT_Init (void)
285 {
286 1 unsigned char SFRPAGE_save = SFRPAGE; // Save the current SFRPAGE
287 1
288 1 SFRPAGE = CONFIG_PAGE; // Switch to the necessary SFRPAGE
289 1
290 1 P0MDOUT = 0x0D; // Make SCK, MOSI, and NSS push-pull
291 1 P1MDOUT = 0x40; // Make the LED push-pull
292 1
293 1 XBR0 = 0x02; // Enable the SPI on the XBAR
294 1 XBR2 = 0x40; // Enable the XBAR and weak pull-ups
295 1
296 1 SFRPAGE = SFRPAGE_save; // Restore the SFRPAGE
297 1 }
298
299 //-----------------------------------------------------------------------------
300 // SPI0_Init
301 //-----------------------------------------------------------------------------
302 //
303 // Return Value : None
C51 COMPILER V8.08 F06X_SPI0_MASTER 02/16/2008 14:38:53 PAGE 6
304 // Parameters : None
305 //
306 // Configures SPI0 to use 4-wire Single Master mode. The SPI timing is
307 // configured for Mode 0,0 (data centered on first edge of clock phase and
308 // SCK line low in idle state).
309 //
310 //-----------------------------------------------------------------------------
311 void SPI0_Init()
312 {
313 1 unsigned char SFRPAGE_save = SFRPAGE; // Save the current SFRPAGE
314 1
315 1 SFRPAGE = SPI0_PAGE; // Switch to the necessary SFRPAGE
316 1
317 1 SPI0CFG = 0x40; // Enable the SPI as a Master
318 1 // CKPHA = '0', CKPOL = '0'
319 1 SPI0CN = 0x0D; // 4-wire Single Master, SPI enabled
320 1
321 1 // SPI clock frequency equation from the datasheet
322 1 SPI0CKR = (SYSCLK/(2*SPI_CLOCK))-1;
323 1
324 1 EIE1 |= 0x01; // Enable SPI interrupts
325 1
326 1 SFRPAGE = SFRPAGE_save; // Restore the SFRPAGE
327 1 }
328
329 //-----------------------------------------------------------------------------
330 // Init_Device
331 //-----------------------------------------------------------------------------
332 //
333 // Return Value : None
334 // Parameters : None
335 //
336 // Calls all device initialization functions.
337 //
338 //-----------------------------------------------------------------------------
339 void Init_Device (void)
340 {
341 1 Watchdog_Init (); // Disable the Watchdog Timer first
342 1 Oscillator_Init ();
343 1 Port_Init ();
344 1 SPI0_Init ();
345 1 }
346
347 //-----------------------------------------------------------------------------
348 // Interrupt Service Routines
349 //-----------------------------------------------------------------------------
350
351 //-----------------------------------------------------------------------------
352 // SPI_ISR
353 //-----------------------------------------------------------------------------
354 //
355 // Handles all error checks and single-byte writes.
356 //
357 // Note: SPI_WRITE_ARRAY is not handled by this ISR in order to take
358 // advantage of double-buffering (checking the TXBMT flag) using polling.
359 //
360 //
361 // Typical Write:
362 //
363 // | 1st sent | 2nd sent | 3rd sent | ... | last sent |
364 // ---------------------------------------------------------
365 // Master NSSv | Command | Data1 | Data2 | ... | DataN | NSS^
C51 COMPILER V8.08 F06X_SPI0_MASTER 02/16/2008 14:38:53 PAGE 7
366 // Slave | N/A | N/A | N/A | ... | N/A |
367 //
368 // Typical Read:
369 //
370 // | 1st sent | 2nd sent | 3rd sent | ... | last sent |
371 // ---------------------------------------------------------
372 // Master NSSv | Command | dummy | dummy | ... | dummy | NSS^
373 // Slave | N/A | Data1 | Data2 | ... | DataN |
374 //-----------------------------------------------------------------------------
375 void SPI_ISR (void) interrupt 6
376 {
377 1 static unsigned char array_index = 0;
378 1 static char state = 0;
379 1
380 1 if (WCOL == 1)
381 1 {
382 2 // Write collision occurred
383 2 WCOL = 0; // Clear the write collision flag
384 2
385 2 Error_Flag = 1;
386 2 }
387 1 else
388 1 {
389 2 if (SPI0DAT == ERROR_OCCURRED)
390 2 {
391 3 // This example recognizes when an error occurs, but does not include
392 3 // any error handling. The transfer can be aborted or rescheduled,
393 3 // if desired.
394 3 Error_Flag = 1;
395 3 }
396 2
397 2 // When the Master enters the ISR, the SPIF flag should be set from
398 2 // sending the Command byte. This ISR handles the remaining steps of the
399 2 // SPI transfer process.
400 2 // <state> == 0: writing or reading 1 byte of data
401 2 // <state> == 1: for READ commands (first time, only a dummy byte is
402 2 // sent but the second time, the data must be read from
403 2 // SPI0DAT)
404 2 // <state> == 2: NSS = 1 to end the transfer, final byte read
405 2 //
406 2 // Note: SPI_WRITE_BUFFER is not handled here because it's done in
407 2 // polled mode
408 2 if (state == 0)
409 2 {
410 3 switch (Command)
411 3 {
412 4 case SLAVE_LED_ON:
413 4 case SLAVE_LED_OFF:
414 4 NSSMD0 = 1; // Release the slave (not expecting
415 4 // data back)
416 4
417 4 break;
418 4
419 4 case SPI_WRITE:
420 4 SPI0DAT = SPI_Data;
421 4
422 4 state = 2; // Advance to the final state (only
423 4 // writing one byte)
424 4
425 4 break;
426 4
427 4 case SPI_READ:
C51 COMPILER V8.08 F06X_SPI0_MASTER 02/16/2008 14:38:53 PAGE 8
428 4 SPI0DAT = 0xFF; // Send a dummy byte so the Slave can
429 4 // send the data
430 4
431 4 state = 2; // Advance to the final state (only
432 4 // reading one byte)
433 4
434 4 break;
435 4
436 4 case SPI_READ_BUFFER:
437 4 array_index = 0; // Clear the data counter
438 4
439 4 SPI0DAT = 0xFF; // Send a dummy byte so the Slave can
440 4 // start sending the data
441 4
442 4 state = 1; // Advance to the next state where the
443 4 // data can be received
444 4 // The data from the slave is not
445 4 // available until after the second
446 4 // transfer is completed.
447 4 // The dummy byte allows the slave to
448 4 // send data, since the Master controls
449 4 // SCK.
450 4
451 4 break;
452 4
453 4 default:
454 4 state = 2; // Any errors in the Command parsing
455 4 // should go to state 2 where NSSMD0
456 4 // is de-asserted
457 4 }
458 3 }
459 2 else if (state == 1) // This state is for READ_ARRAY
460 2 { // commands where the data must be read
461 3 // after the first dummy byte is sent
462 3 switch (Command)
463 3 {
464 4 case SPI_READ_BUFFER:
465 4 SPI_Data_Array[array_index] = SPI0DAT;
466 4 SPI0DAT = 0xFF;
467 4
468 4 array_index++;
469 4
470 4 if (array_index == (MAX_BUFFER_SIZE-1))
471 4 {
472 5 state = 2;
473 5 }
474 4
475 4 break;
476 4 default:
477 4 state = 2; // Any errors in the Command parsing
478 4 // should go to state 2 where NSSMD0
479 4 // is de-asserted
480 4 }
481 3 }
482 2 else if (state == 2)
483 2 {
484 3 switch (Command)
485 3 {
486 4 case SPI_READ:
487 4 SPI_Data = SPI0DAT; // Read the data from the slave
488 4
489 4 break;
C51 COMPILER V8.08 F06X_SPI0_MASTER 02/16/2008 14:38:53 PAGE 9
490 4
491 4 case SPI_READ_BUFFER:
492 4 SPI_Data_Array[array_index] = SPI0DAT; // Read the last data
493 4 // without sending a
494 4 // dummy byte
495 4
496 4 break;
497 4 }
498 3
499 3 NSSMD0 = 1; // De-select the Slave
500 3
501 3 state = 0; // Reset the state
502 3 }
503 2
504 2 SPIF = 0; // Clear the SPIF flag
505 2 }
506 1 }
507
508 //-----------------------------------------------------------------------------
509 // Support Routines
510 //-----------------------------------------------------------------------------
511
512 //-----------------------------------------------------------------------------
513 // SPI_LED_On
514 //-----------------------------------------------------------------------------
515 //
516 // Return Value : None
517 // Parameters : None
518 //
519 // Turns the LED on the SPI Slave on. The slave does not respond to this
520 // command, so the command consists of:
521 //
522 // Command = SLAVE_LED_ON
523 // Length = 1 byte (the command itself)
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