📄 f06x_spi0_slave.lst
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214
215 //-----------------------------------------------------------------------------
216 // Init_Device
217 //-----------------------------------------------------------------------------
218 //
219 // Return Value : None
220 // Parameters : None
221 //
222 // Calls all device initialization functions.
223 //
224 //-----------------------------------------------------------------------------
225 void Init_Device (void)
226 {
227 1 Watchdog_Init (); // Disable the Watchdog Timer first
228 1 Oscillator_Init ();
229 1 Port_Init ();
230 1 SPI0_Init ();
231 1 }
232
233 //-----------------------------------------------------------------------------
234 // Interrupt Service Routines
235 //-----------------------------------------------------------------------------
236
237 //-----------------------------------------------------------------------------
238 // SPI_ISR
239 //-----------------------------------------------------------------------------
240 //
241 // Handles all incoming data and interprets the commands sent from the Master.
C51 COMPILER V8.08 F06X_SPI0_SLAVE 12/30/2007 08:45:23 PAGE 5
242 //
243 // Typical Write:
244 //
245 // | 1st sent | 2nd sent | 3rd sent | ... | last sent |
246 // ---------------------------------------------------------
247 // Master NSSv | Command | Data1 | Data2 | ... | DataN | NSS^
248 // Slave | N/A | N/A | N/A | ... | N/A |
249 //
250 // Typical Read:
251 //
252 // | 1st sent | 2nd sent | 3rd sent | ... | last sent |
253 // ---------------------------------------------------------
254 // Master NSSv | Command | dummy | dummy | ... | dummy | NSS^
255 // Slave | N/A | Data1 | Data2 | ... | DataN |
256 //-----------------------------------------------------------------------------
257 void SPI_ISR (void) interrupt 6
258 {
259 1 static unsigned char command;
260 1 static unsigned char array_index = 0;
261 1 static unsigned char state = 0;
262 1 unsigned char dummy_byte;
263 1
264 1 if (WCOL == 1)
265 1 {
266 2 // Write collision occurred
267 2
268 2 SPI0DAT = ERROR_OCCURRED; // Indicate an error occurred
269 2 WCOL = 0; // Clear the Write collision flag
270 2 }
271 1 else if (RXOVRN == 1)
272 1 {
273 2 // Receive overrun occurred
274 2
275 2 SPI0DAT = ERROR_OCCURRED; // Indicate an error occurred
276 2 RXOVRN = 0; // Clear the Receive Overrun flag
277 2 }
278 1 else
279 1 {
280 2 // SPIF caused the interrupt
281 2
282 2 // Some commands are single-byte commands (SLAVE_LED_ON/SLAVE_LED_OFF)
283 2 // For multiple-byte commands, use the state to determine action
284 2 // <state> == 0: new transfer; a command is being received
285 2 // <state> == 1: writing/reading data
286 2 if (state == 0)
287 2 {
288 3 command = SPI0DAT; // Read the command
289 3
290 3 array_index = 0; // Reset the array index
291 3
292 3 switch (command)
293 3 {
294 4 case SLAVE_LED_ON:
295 4 LED = 1;
296 4 state = 0; // End of transfer (no bytes to send)
297 4
298 4 break;
299 4
300 4 case SLAVE_LED_OFF:
301 4 LED = 0;
302 4 state = 0; // End of transfer (no bytes to send)
303 4
C51 COMPILER V8.08 F06X_SPI0_SLAVE 12/30/2007 08:45:23 PAGE 6
304 4 break;
305 4
306 4 case SPI_WRITE:
307 4 state = 1; // Do nothing
308 4 // Move to State 1 to read data from
309 4 // Master
310 4
311 4 break;
312 4
313 4 case SPI_READ:
314 4 SPI0DAT = SPI_Data; // Immediately load SPI0DAT with the
315 4 // data requested by the Master, so the
316 4 // Master can receive it at the end of
317 4 // the second transfer.
318 4 // Because the slave sends the data
319 4 // immediately, the Master's SCK is
320 4 // limited to a clock slow enough that
321 4 // the Slave has time to respond to a
322 4 // read.
323 4
324 4 state = 0; // End of transfer (only one byte)
325 4
326 4 break;
327 4
328 4 case SPI_WRITE_BUFFER:
329 4 state = 1; // Do nothing
330 4 // Move to State 1 to read data from
331 4 // Master
332 4
333 4 break;
334 4
335 4 case SPI_READ_BUFFER:
336 4 SPI0DAT = SPI_Data_Array[array_index]; // Immediately load
337 4 // SPI0DAT with the data requested by
338 4 // the Master, so the Master can receive
339 4 // it at the end of the second transfer.
340 4 // Because the slave sends the data
341 4 // immediately, the Master's SCK is
342 4 // limited to a clock slow enough that
343 4 // the Slave has time to respond to a
344 4 // read.
345 4
346 4 array_index++;
347 4
348 4 state = 1; // Move to State 1 to continue to send
349 4 // data to the Master (multiple bytes).
350 4
351 4 break;
352 4
353 4 default:
354 4 state = 0;
355 4 }
356 3
357 3 }
358 2 else if (state == 1)
359 2 {
360 3 switch (command)
361 3 {
362 4 case SPI_WRITE:
363 4 SPI_Data = SPI0DAT;
364 4
365 4 state = 0; // End of transfer (one byte received)
C51 COMPILER V8.08 F06X_SPI0_SLAVE 12/30/2007 08:45:23 PAGE 7
366 4
367 4 break;
368 4
369 4 case SPI_WRITE_BUFFER:
370 4 SPI_Data_Array[array_index] = SPI0DAT; // Receive the next byte
371 4
372 4 array_index++;
373 4
374 4 if (array_index == MAX_BUFFER_SIZE) // Check for last data
375 4 {
376 5 state = 0; // Reset the state (end of transfer)
377 5 }
378 4 else
379 4 {
380 5 state = 1; // Continue to read in data (more
381 5 // bytes to receive)
382 5 }
383 4
384 4 break;
385 4
386 4 case SPI_READ_BUFFER:
387 4 SPI0DAT = SPI_Data_Array[array_index]; // Send the next byte
388 4 dummy_byte = SPI0DAT; // Read the dummy data the Master is
389 4 // sending from SPI0DAT to prevent a
390 4 // RXOVRN (Receive overrun) error
391 4
392 4 array_index++;
393 4
394 4 if (array_index == MAX_BUFFER_SIZE) // Check for last data
395 4 {
396 5 state = 0; // Reset the state (end of transfer)
397 5 }
398 4 else
399 4 {
400 5 state = 1; // Continue to send out data (more
401 5 // bytes to send)
402 5 }
403 4
404 4 break;
405 4
406 4 default:
407 4 state = 0;
408 4 }
409 3 }
410 2
411 2 SPIF = 0; // Clear the SPIF flag
412 2 }
413 1 }
414
415 //-----------------------------------------------------------------------------
416 // End Of File
417 //-----------------------------------------------------------------------------
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 257 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 12 1
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
C51 COMPILER V8.08 F06X_SPI0_SLAVE 12/30/2007 08:45:23 PAGE 8
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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