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📄 pdptimings.cpp

📁 Lido PXA270平台开发板的最新BSP,包括源代码
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		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{	// These are the timings for the Sharp LCD Display panel.
		176,							// XRes
		220,							// Yres
		60,								// Refresh rate in Hz.
		14840,                       	// Line rate in Hz (typically >30KHz, on vga timings
		6530000,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is positive

		1,								// Horizontal front porch
		68,								// Horiztonal sync
		51,								// Horizontal back porch
		72,								// Horizontal left border
		72,								// Horizontal right border
		6,								// Vertical front porch
		5,								// Vertical sync
		2,								// Veritcal back porch
		10,								// Vertical top border
		10,								// Vertical bottom border
		176,							// HActive
		220,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{	// These are the timings for the Sharp LCD Display panel.
		160,							// XRes
		240,							// Yres
		60,								// Refresh rate in Hz.
		14840,                       	// Line rate in Hz (typically >30KHz, on vga timings
		6530000,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		TRUE,							// Not pixel doubled
		TRUE,							// Blanking signal is positive

		1,								// Horizontal front porch
		68,								// Horiztonal sync
		51,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border
		6,								// Vertical front porch
		5,								// Vertical sync
		2,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		160,							// HActive
		240,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	}
};

// Toshbiba Display used in Mainstone Systems 640x480  PDP_TOSHIBA_LTM04C380S		// this is the standard 640x480 timings
PDP_TIMINGS asLTM04C380STimings[]=
{

	{	// These are the timings for the Sharp LCD Display panel.
		640,							// XRes
		480,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		25176232,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is negative

		16,								// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		96,								// Horiztonal sync
		48,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		10,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		2,								// Vertical sync
		33,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		640,							// HActive
		480,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{	// These are the timings for the Sharp LCD Display panel.
		320,							// XRes
		240,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		25176232,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		TRUE,							// Line doubled
		TRUE,							// pixel doubled
		TRUE,							// Blanking signal is negative

		16,								// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		96,								// Horiztonal sync
		48,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		10,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		2,								// Vertical sync
		33,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		320,							// HActive
		240,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{
		240,							// XRes
		320,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		25176232,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is positive

		16,								// Horizontal front porch
		96,								// Horiztonal sync
		48,								// Horizontal back porch
		200,							// Horizontal left border
		200,							// Horizontal right border
		10,								// Vertical front porch
		2,								// Vertical sync
		33,								// Veritcal back porch
		80,								// Vertical top border
		80,								// Vertical bottom border
		240,							// Xres
		320,							// YRes
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	}

};

// Sharp prototype panel 640x480, 320x240   PDP_SHARP_LS047D
// Need more info to fill this in, such as clock rate...
PDP_TIMINGS asLS047DTimings[]=
{
	{
		480,							// XRes
		640,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		25176232,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is negative

		87,							// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		2,								// Horiztonal sync
		78,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		6,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		2,								// Vertical sync
		0,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		480,							// HActive
		640,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
   	{
		640,							// XRes
		480,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		25176232,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is negative

		87,							// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		2,								// Horiztonal sync
		78,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		6,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		2,								// Vertical sync
		0,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		480,							// HActive
		640,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{	
		320,							// XRes
		240,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		6294058,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is negative

		44,								// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		2,								// Horiztonal sync
		38,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		0,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		1,								// Vertical sync
		3,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		240,							// HActive
		320,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	},
	{	
		240,							// XRes
		320,							// Yres
		60,								// Refresh rate in Hz.
		31466,                       	// Line rate in Hz (typically >30KHz, on vga timings
		6294058,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled
		FALSE,							// Not pixel doubled
		TRUE,							// Blanking signal is negative

		44,								// Horizontal front porch   // moved the 8 pixel borders to the front and back porch
		2,								// Horiztonal sync
		38,								// Horizontal back porch
		0,								// Horizontal left border
		0,								// Horizontal right border

		0,								// Vertical front porch    // moved the 8 pixel border to the front and back porch
		1,								// Vertical sync
		3,								// Veritcal back porch
		0,								// Vertical top border
		0,								// Vertical bottom border
		240,							// HActive
		320,							// VActive
										
		1,								// Polarity of Hsync pulse, True = Positive;
		1,								// Polarity of VSync pulse, True = Positive;
		PDP_FULL_REFRESH,				// Specify we refresh the screen at full rate
		0,								// No time between refreshes (not used in PDP_FULL_REFRESH mode
		TRUE,							// Full rate Syncs
		TRUE,							// Full rate interrupts
		10000,							// Backlight control value of 10us which equates to a 100Khz Backlight frequency
	}
};


// The timings below are just guesses, and should be filled in when more detailed info is available

// Mobile Phone Style display 176x220    PDP_SHARP_LQ022B2DB02T
PDP_TIMINGS asLQ022B2DB02TTimings[]=
{

	{	// These are the timings for the Sharp LCD Display panel.
		176,							// XRes
		220,							// Yres
		60,								// Refresh rate in Hz.
		13315,                       	// Line rate in Hz (typically >30KHz, on vga timings
		6530000,						// Dot Clock in Hz (typically >27 MHz, on vga timings

		FALSE,							// Not Line doubled

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