📄 services.h
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typedef struct _SYS_DATA_* SYSDATA_HANDLE; /*!< sysdata handle */
typedef struct _PVR3DIF_PARAMBUFFER_* PVRSRV_PARAMBUFFER_HANDLE; /*!< parameter buffer handle */
typedef struct _QUEUE_INFO_* PVRSRV_QUEUE_HANDLE; /*!< queue handle */
typedef struct _PVR3DIF_SHAREDDATA_ *PPVRSRV_3DSHAREDDATA; /*!< forward reference */
typedef struct _PVR_CS_INFO_ *PPVRSRV_CSINFO; /*!< forward reference */
/***********************************************************************
Mutexes and resources implementations are based on OS and CPU type:
***********************************************************************/
#if defined (UNDER_CE) /* WinCE / PPC? */
#if defined (_X86_)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#elif defined(_ARM_)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#else
#error "CPU is undefined for Mutex and Resource definitions"
#endif
#else
#if defined(LINUX)
#if defined (__i386__)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#elif defined(__arm__)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#else
#if defined(__SH4__)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#else
#error "CPU is undefined for Mutex and Resource definitions"
#endif
#endif
#else
#if defined(__SYMBIAN32__)
typedef volatile IMG_UINT32 PVRSRV_MUTEX_HANDLE;
typedef volatile IMG_UINT32 PVRSRV_RES_HANDLE;
#else
#error "OS is undefined for Mutex and Resource definitions"
#endif
#endif
#endif
/*****************************************************************************
* Structure definitions.
*****************************************************************************/
/*!
*****************************************************************************
* address:value register structure
*****************************************************************************/
typedef struct _PVRSRV_HWREG_
{
IMG_UINT32 ui32RegAddr; /*!< Address */
IMG_UINT32 ui32RegVal; /*!< value */
} PVRSRV_HWREG;
/*!
******************************************************************************
* Information required to use a slave port
******************************************************************************/
typedef struct _PVRSRV_DEV_SLAVE_PORT_
{
IMG_PVOID pvData; /*!< a pointer to the base of the slave port */
IMG_UINT32 ui32DataRange; /*!< the size of the slave port address range */
IMG_PUINT32 pui32Offset; /*!< a pointer to the current offset into the slave port */
IMG_CPU_PHYADDR sPhysBase; /*!< Physical Slave port base */
}PVRSRV_DEV_SLAVE_PORT, *PPVRSRV_DEV_SLAVE_PORT;
/*!
*****************************************************************************
* Host RTA interface structure. Generally only have one of these per rendering
* context.
*****************************************************************************/
typedef struct _PVRSRV_TARENDERINFO_
{
PPVRSRV_3DSHAREDDATA psSharedData; /*!< shared ta/render data */
IMG_PVOID pvTailPtrs; /*!< cpu linear address of tail ptrs */
struct _PVRSRV_TARENDERINFO_ *psTARenderInfoKM; /*!< glue code mapping pointer */
#ifdef PDUMP
struct _PDUMP_CONTEXT_ *psPDContext; /*!< pdump context */
#endif
} PVRSRV_TARENDERINFO;
/*!
*****************************************************************************
* Information required to complete the background object data for a render.
*****************************************************************************/
typedef struct _PVRSRV_BGOBJ_INFO_
{
IMG_UINT32 ui32TexFormatStride; /*!< HW texture format and stride */
IMG_UINT32 ui32TexAddrStride; /*!< HW texture address */
} PVRSRV_BGOBJ_INFO;
/*!
******************************************************************************
* Information about the resources of the device
******************************************************************************/
typedef struct _PVRSRV_DEV_LOCATION_
{
IMG_PVOID pvRegsBaseKM; /*!< Kernel mode linear address of current device register */
IMG_SYS_PHYADDR sRegsPhysBase; /*!< Physical register base */
IMG_UINT32 ui32RegSize; /*!< Register region size (for this device) in bytes */
IMG_SYS_PHYADDR sPhysicalBase; /*!< Address of the bottom of DevPhys memory
in the Sys Phys address space */
IMG_SYS_PHYADDR sSOCRegsPhysBase; /*!< SOC register base */
IMG_UINT32 ui32SOCRegSize; /*!< SOC register syze */
IMG_PVOID pvSOCRegsBaseKM; /*!< Kernel mode linear address of SOC registers */
/*
* Union to hold location information specific to a specific device type
*/
union {
/*
* MBX specific data
*/
struct {
PVRSRV_DEV_SLAVE_PORT sTASlavePort; /*!< TA Slave port info */
PVRSRV_DEV_SLAVE_PORT s2DSlavePort; /*!< 2D Slave port info */
PVRSRV_DEV_SLAVE_PORT sTAControlSlavePort; /*!< TA Control slave port info */
#ifdef SUPPORT_KYRO_AS_MBX_DEVICE
IMG_UINT32 ui32MBXRegsPhysBase; /*!< MBX registers physical base address */
IMG_UINT32 ui32MBXRegSize; /*!< MBX register range */
IMG_UINT32 ui32MBXRegsLinBase; /*!< should this be a IMG_CPU_VIRTADDR */
#endif
} sMBX;
/*
* MPEG specific data
*/
struct
{
IMG_CPU_PHYADDR sSPPhysicalBase; /*!< Physical Slave port base */
IMG_PVOID pvSPLinearBase; /*!< Linear slave port */
IMG_UINT32 ui32SPSize; /*!< Total size of region in bytes */
IMG_PVOID pvSPCmd; /*!< Command data linear sp addr */
IMG_UINT32 ui32SPCmdRange; /*!< Command data sp range */
IMG_PVOID pvSPIDCT; /*!< IDCT data linear sp addr */
IMG_UINT32 ui32SPIDCTRange; /*!< IDCT data sp range */
} sM24VA;
}sDeviceSpecific;
} PVRSRV_DEV_LOCATION, *PPVRSRV_DEV_LOCATION;
/*!
*****************************************************************************
* PCI Bus specific information
*****************************************************************************/
#ifdef SUPPORT_PCI
typedef struct _PVRSRV_DEV_PCI_
{
IMG_UINT32 ui32Bus;
IMG_UINT32 ui32Device;
IMG_UINT32 ui32Function;
IMG_UINT32 ui32Irq;
}PVRSRV_DEV_PCI, *PVRSRV_PDEV_PCI;
#endif /* #ifdef SUPPORT_PCI */
/*!
*****************************************************************************
* Structure providing implementation details for serialisation and
* synchronisation of operations. This is the fundamental unit on which operations
* are synced, and would typically be included in any data structures that require
* serialised accesses etc. e.g. MEM_INFO structures
*
*****************************************************************************/
typedef struct _PVRSRV_SYNC_INFO_
{
IMG_UINT32 ui32NextWriteOp; /*!< Index of the next write operation that will be
created on this sync info object. Increases by one each time
a write operation is added. */
volatile IMG_UINT32 *pui32LastWriteOp; /*!< Kernel virtual address of a field in frame buffer that holds the
number of the last write operation that has completed on this sync info */
volatile IMG_UINT32 ui32ReadOpsComplete; /*!< Number of Read operations that completed since the last write operation */
IMG_UINT32 ui32ReadOpsPending; /*!< Number of read operations submitted since the last write op */
volatile IMG_UINT32 ui32LastWriteOpVal; /*!< pui32LastWriteOp points to this */
volatile IMG_UINT32 ui32BlitOpsPending; /*!< required to flush read dependencies before TA'ing a scene */
volatile IMG_UINT32 ui32BlitOpsComplete; /*!< required to flush read dependencies before TA'ing a scene */
struct _PVRSRV_SYNC_INFO_ *psKernSyncInfo; /*!< Kernel side implementation details */
} PVRSRV_SYNC_INFO;
/*!
*****************************************************************************
* Implementation details for synchronising the sources used in commands
*****************************************************************************/
typedef struct _PVRSRV_SRCSYNC_INFO_
{
IMG_UINT32 ui32NextWriteOpVal; /*!< As per PVRSRV_SYNC_INFO */
PVRSRV_SYNC_INFO *psSyncInfoKM; /*!< As per PVRSRV_SYNC_INFO */
} PVRSRV_SRCSYNC_INFO;
/*!
*****************************************************************************
* Circular command buffer structure forming the queue of pending commands.
*
* Queues are implemented as circular comamnd buffers (CCBs).
* The buffer is allocated as a specified size, plus the size of the largest supported command.
* The extra size allows commands to be added without worrying about wrapping around at the end.
*
* Commands are added to the CCB by client processes and consumed within
* kernel mode code running from within an L/MISR typically.
*
* The process of adding a command to a queue is as follows:-
* - A `lock' is acquired to prevent other processes from adding commands to a queue
* - Data representing the command to be executed, along with it's PVRSRV_SYNC_INFO
* dependencies is written to the buffer representing the queue at the queues
* current WriteOffset.
* - The PVRSRV_SYNC_INFO that the command depends on are updated to reflect
* the addition of the new command.
* - The WriteOffset is incremented by the size of the command added.
* - If the WriteOffset now lies beyound the declared buffer size, it is
* reset to zero.
* - The semaphore is released.
*
*****************************************************************************/
typedef struct _PVRSRV_QUEUE_INFO_
{
IMG_VOID *pvLinQueueKM; /*!< Pointer to the command buffer in the kernel's
address space */
IMG_VOID *pvLinQueueUM; /*!< Pointer to the command buffer in the user's
address space */
volatile IMG_UINT32 ui32ReadOffset; /*!< Index into the buffer at which commands are being
consumed */
volatile IMG_UINT32 ui32WriteOffset; /*!< Index into the buffer at which commands are being
added */
PVRSRV_RES_HANDLE hAccess; /*!< Access lock */
IMG_UINT32 *pui32KickerAddr; /*!< kicker address */
IMG_UINT32 ui32QueueSize; /*!< Size in bytes of the buffer - excluding the safety allocation */
PRESMAN_ITEM psResItem; /*!< resource hook */
struct _PVRSRV_QUEUE_INFO_ *psNextKM; /*!< The next queue in the system */
}PVRSRV_QUEUE_INFO;
/*!
*****************************************************************************
* A command is an indivisible operations to be by the asynchronous services
* code - examples would include :-
* - Switch the display to a new memory buffer.
* - Start rendering to a surface.
* - Start a DMA transfer.
*
* They are deferable - i.e. they do not happen instantly, but will be executed in a
* predictable order.
*
* This structure is the basis for all other command structures and is included in them,
*
* Commands are synchronised in terms of PVRSRV_QUEUE_INFO and PVRSRV_SYNC_INFO objects.
*
* A command will only be executed when :-
* - It is at the head of a queue.
* - any previous commands that have read/write accesses to PVRSRV_SYNC_INFO objects it is
* dependent on with have completed
* - all previous commands that read from PVRSRV_SYNC_INFO objects it is
* dependent on with have completed
* - The hardware required for the command is available.
*
*****************************************************************************/
typedef struct _PVRSRV_CMD_HEADER_
{
IMG_UINT32 ui32CommandID; /*!< Specifies the type of the command */
IMG_UINT32 ui32Size; /*!< Number of bytes forming the command */
} PVRSRV_CMD_HEADER;
/*!
*****************************************************************************
* Blit command structure enetered into a command queue.
* Blit commands have one destination MEM_INFOs and up to PVRSRV_MAX_BLT_SRC
* source MEM_INFOs.
*****************************************************************************/
typedef struct _PVRSRV_BLT_CMD_INFO_
{
PVRSRV_CMD_HEADER sCmdInfo; /*!< Common to all command info structures */
IMG_UINT32 ui32DstNextOpVal; /*!< Pre condition for cmd execution.
dest->NextOp == ui32DstNextOpVal-1 */
IMG_UINT32 ui32DstReadOpsPending; /*!< Pre condition for cmd execution
dest->ReadsCompleted == ui32DstReadOpsPending */
PVRSRV_SYNC_INFO *psDstSyncInfoKM; /*!< pointer to the Dest's Sync info structre */
IMG_BOOL bUpdatePrimary; /*!< Single shot display support - Hint for implementation */
IMG_UINT32 ui32NumSrcSyncInfos; /*!< How many sources are we synchronising with */
PVRSRV_SRCSYNC_INFO asSrcSyncInfo[PVRSRV_MAX_BLT_SRC];
/*!< Pointers to the SyncInfos within the source MEM_INFOs */
IMG_UINT32 ui32DataCount; /*!< Size of the blit data stream in 4 byte units */
IMG_UINT32 aui32BltData[1]; /*!< Start of the blit data stream. Real array size is ui32DataCount */
}PVRSRV_BLT_CMD_INFO;
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