m24vahw.h

Lido PXA270平台开发板的最新BSP,包括源代码

/******************************************************************************
* Name         : m24vahw.h
* Title        : M24VA motion compensation unit.
* Author(s)    : Imagination Technologies
* Created      : 1st August 2003
*
* Copyright    : 2003 by Imagination Technologies Limited.
*                All rights reserved.  No part of this software, either
*                material or conceptual may be copied or distributed,
*                transmitted, transcribed, stored in a retrieval system 
*                or translated into any human or computer language in any
*                form by any means, electronic, mechanical, manual or
*                other-wise, or disclosed to third parties without the
*                express written permission of Imagination Technologies
*                Limited, Unit 8, HomePark Industrial Estate, 
*                King's Langley, Hertfordshire, WD4 8LZ, U.K.
*
* Description  : Hardware definitions for M24VA that are NOT included in the 
*                external interface API for this core. (see pvrvadd.h).
*
* Platform     : Generic
*
* Notes        : formerly m24vahw.h mks rev 1.1
*
* Modifications:-
* $Log: m24vahw.h $
*
*
******************************************************************************/

#if !defined (_M24VAHW_H_)
#define _M24VAHW_H_

#ifndef IMG_M24VAg

/* Sizes are in 64bit word units */
#define M24VA_CMD_FIFO_SIZE			(0x1f)
#define M24VA_IDCT_FIFO_SIZE		(0x3f)
#define M24VA_IZZ_FIFO_SIZE			(0x1f)


#endif /* #ifndef IMG_M24VAg */

#ifdef IMG_M24VAg
/* Register addresses (Input Stream A) */
#define M24VAREG_SOFT_RESET			(0x0000)
#define M24VAREG_OUTPUT_BASE		(0x0010)
#define M24VAREG_REF1_BASE			(0x0014)
#define M24VAREG_REF2_BASE			(0x0018)
#define M24VAREG_IMAGE_DIMENSIONS	(0x0020)
#define M24VAREG_STRIDE_SIZE		(0x0024)
#define	M24VAREG_YUV_CONV_A			(0x0030)
#define	M24VAREG_YUV_CONV_B			(0x0034)
#define	M24VAREG_YUV_CONV_C			(0x0038)
#define	M24VAREG_YUV_CONV_D			(0x003C)
#define	M24VAREG_YUV_CONV_E			(0x0040)
#define	M24VAREG_YUV_CONV_F			(0x0044)
#define	M24VAREG_YUV_CONV_STATE		(0x0048)
#define	M24VAREG_COMMAND_BUF_STATE	(0x0050)
#define	M24VAREG_COMMAND_COUNT		(0x0054)
#define M24VAREG_IDCT_BUF_STATE		(0x0060)
#define M24VAREG_IDCT_COUNT			(0x0064)
#define	M24VAREG_BIST_RESULT		(0x0070)
#define	M24VAREG_BIST_TEST_ENABLE	(0x0074)
#define	M24VAREG_BIST_START_TEST	(0x0078)
#define	M24VAREG_BIST_FINISHED		(0x007c)
#define M24VAREG_INTERRUPT_STATUS	(0x0080)
#define M24VAREG_INTERRUPT_MASK 	(0x0084)
#define M24VAREG_INTERRUPT_CLEAR	(0x0088)

#define M24VA_MAX_REG_ADDR			(0x0088)
#else
/* Register addresses (Input Stream A) */
#define M24VAREG_SOFT_RESET			(0x0000)
#define M24VAREG_OUTPUT_BASE		(0x0010)
#define M24VAREG_REF1_BASE			(0x0014)
#define M24VAREG_REF2_BASE			(0x0018)
#define M24VAREG_IMAGE_DIMENSIONS	(0x0020)
#define M24VAREG_STRIDE_SIZE		(0x0024)
#define	M24VAREG_YUV_CONV_A			(0x0030)
#define	M24VAREG_YUV_CONV_B			(0x0034)
#define	M24VAREG_YUV_CONV_C			(0x0038)
#define	M24VAREG_YUV_CONV_D			(0x003C)
#define	M24VAREG_YUV_CONV_E			(0x0040)
#define	M24VAREG_YUV_CONV_F			(0x0044)
#define	M24VAREG_YUV_CONV_STATE		(0x0048)
#define	M24VAREG_BUF_STATE			(0x0050)
#define M24VAREG_SIG_0				(0x0060)
#define M24VAREG_SIG_1				(0x0064)
#define M24VAREG_SIG_2				(0x0068)
#define M24VAREG_INTERRUPT_STATUS	(0x0080)
#define M24VAREG_INTERRUPT_ENABLE 	(0x0084)
#define M24VAREG_INTERRUPT_CLEAR	(0x0088)
#define M24VAREG_ENABLE_IDCT		(0x0090)

#define M24VAREG_CORE_ID			(0x00A0)
#define M24VAREG_CORE_REV			(0x00B0)

#define M24VA_MAX_REG_ADDR			(0x00BC)
#endif /* IMG_M24VAg */



/* Commands, not defined in pvrvadd.h */
#define M24VA_CMD_END_OF_FRAME	(0x78000000)

/* Bit Fields */

/* Reset */
#define M24VA_SOFT_RESET_RESET		(0x00000001)

/* Image Dimensions */
#define M24VA_IMG_DIM_WIDTH_MASK	(0x000007ff)
#define M24VA_IMG_DIM_WIDTH_SHIFT	(00)
#define M24VA_IMG_DIM_HEIGHT_MASK	(0x003ff800)
#define M24VA_IMG_DIM_HEIGHT_SHIFT	(11)
#define M24VA_IMG_DIM_FORMAT_MASK	(0x00c00000)
#define M24VA_IMG_DIM_FORMAT_SHIFT	(22)

/* Image BASE */
#define M24VAREG_BASE_SHIFT			(3)

/* Interrup registers (same bit defintions for all 3 registers) */
#define M24VA_INTERRUPT_YUVCONV		 (0x00000001)
#define M24VA_INTERRUPT_MC			 (0x00000002)
#define M24VA_INTERRUPT_ALL			 (0x00000003)
#define M24VA_INTERRUPT_MASTER		 (0x00008000)

/* YUV Format Conversion C */
#define M24VA_YUV_C_WIDTH_MASK	     (0x000007ff)
#define M24VA_YUV_C_WIDTH_SHIFT      (0)
#define M24VA_YUV_C_HGHT_MASK        (0x003ff800)
#define M24VA_YUV_C_HGHT_SHIFT       (11)

/* YUV Format Conversion D */
#define M24VA_YUV_D_420_STRIDE_MASK  (0x000001ff)
#define M24VA_YUV_D_420_STRIDE_SHIFT (0)
#define M24VA_YUV_D_422_STRIDE_MASK  (0x0007fe00)
#define M24VA_YUV_D_422_STRIDE_SHIFT (9)

/* YUV Conv Start */
#define M24VA_YUV_CONV_START_ENABLE	 (0x00000001)
#define M24VA_YUV_CONV_RGB_ENABLE	 (0x00000002)
#define M24VA_YUV_CONV_FIN			 (0x00010000)

#ifdef IMG_M24VAg
/* Command Buffer State */
#define M24VA_COM_BUF_EMPTY			 (0x00000001)
#define M24VA_COM_BUF_FULL			 (0x00000002)
#define M24VA_CORE_BUSY				 (0x00000004)

/* IDCT Buffer State */
#define M24VA_IDCTBUF_EMPTY			 (0x00000001)
#define M24VA_IDCTBUF_FULL			 (0x00000002)
#else
/* Buffer state */
#define M24VA_BUFSTATE_COM_EMPTY	    (0x00000001)
#define M24VA_BUFSTATE_COM_FULL			(0x00000002)
#define M24VA_BUFSTATE_IDCT_EMPTY		(0x00000004)
#define M24VA_BUFSTATE_IDCT_FULL		(0x00000008)
#define M24VA_BUFSTATE_IZZ_EMPTY		(0x00000010)
#define M24VA_BUFSTATE_IZZ_FULL			(0x00000020)
#define M24VA_BUFSTATE_COM_COUNT_MASK   (0x00001fc0)
#define M24VA_BUFSTATE_COM_COUNT_SHIFT  (6)
#define M24VA_BUFSTATE_IDCT_COUNT_MASK  (0x001fe000)
#define M24VA_BUFSTATE_IDCT_COUNT_SHIFT (13)
#define M24VA_BUFSTATE_IZZ_COUNT_MASK   (0x03e00000)
#define M24VA_BUFSTATE_IZZ_COUNT_SHIFT  (21)
#define M24VA_BUFSTATE_CORE_BUSY	    (0x04000000)


/* IDCT Enable Regsiter */
#define M24VA_IDCT_ENABLE			 (0x00000001)

/* iZZ Data Format */
#define M24VA_IZZ_EOB				 (0x00000001)
#define M24VA_IZZ_MODE_CHANGE		 (0x00008000)
#define M24VA_IZZ_SCAN_MASK			 (0x00006000)
#define M24VA_IZZ_SCAN_ZIG_ZAG		 (0x00000000)
#define M24VA_IZZ_SCAN_ALT_VERT		 (0x00002000)
#define M24VA_IZZ_SCAN_ALT_HORIZ	 (0x00004000)
#define M24VA_IZZ_SCAN_RASTER		 (0x00006000)
#define M24VA_IZZ_COEFF_SHIFT		 (16)
#define M24VA_IZZ_INDEX_SHIFT		 (1)
#define M24VA_IZZ_INDEX_MASK		 (0xfe)

/* Core ID */
#define M24VA_CORE_ID_GROUPID_MASK	(0xFF000000)
#define M24VA_CORE_ID_GROUPID_SHIFT	(24)

#define M24VA_CORE_ID_COREID_MASK	(0x00FF0000)
#define M24VA_CORE_ID_COREID_SHIFT	(16)

#define M24VA_CORE_ID_CONFIG_MASK	(0x0000FFFF)
#define M24VA_CORE_ID_CONFIG_SHIFT	(0)


#endif /* IMG_M24VAg */

#endif /* _M24VAHW_H_ */

/*****************************************************************************
 End of file (m24vawmv.h)
*****************************************************************************/