mbx13ddef.h

Lido PXA270平台开发板的最新BSP,包括源代码

#ifdef DEBUG
/*
 *	EVM debug HW registers
 */
#define MBX1_GLOBREG_FREELIST_HEAD 				0x0868
#define MBX1_GLOBREG_FREELIST_TAIL 				0x086C
#define MBX1_GLOBREG_CONTEXT0_HEAD 				0x0870
#define MBX1_GLOBREG_CONTEXT0_TAIL 				0x0874
#define MBX1_GLOBREG_CONTEXT0_PAGECOUNT			0x0878
#define MBX1_GLOBREG_CONTEXT1_HEAD 				0x087C
#define MBX1_GLOBREG_CONTEXT1_TAIL 				0x0880
#define MBX1_GLOBREG_CONTEXT1_PAGECOUNT			0x0884
#endif

/*
 * Event Manager List Start Page	
 * The first page to be allocated by the event manager. 
 * This register is only examined when evm_init is written to.
 */
#define MBX1_TAGLOBREG_EVM_LIST_START			0x00000828
#define MBX1_TA_EVM_LIST_START_SHIFT			0
#define MBX1_TA_EVM_LIST_START_MASK				0x00001FFF

/*
 * Event Manager List End Page
 * The last page to be allocated by the event manager. 
 * This register is only examined when evm_init is written to.
 */
#define MBX1_TAGLOBREG_EVM_LIST_END				0x0000082C
#define MBX1_TA_EVM_LIST_END_SHIFT				0
#define MBX1_TA_EVM_LIST_END_MASK				0x00001FFF

/*
 * Event Manager Render Timeout (Write Only)
 * In the unlikely event that the 3D core locks up, writing 
 * to this register causes the parameter management to pretend 
 * that the 3D core render has finished, and de-allocate all 
 * the memory that is assigned to the frame that the 3D core 
 * is currently trying to render. This register should only 
 * be used when a render is in progress. Suggested usage would 
 * be to reset the 3D core, then write to this register.
 */
#define MBX1_TAGLOBREG_EVM_RENDER_TIMEOUT		0x00000830
#define MBX1_TA_EVM_RENDER_TIMEOUT_SHIFT		0
#define MBX1_TA_EVM_RENDER_TIMEOUT_MASK			0xFFFFFFFF

/*
 * Event Manager TA Timeout (Write Only)
 * In the unlikely event that the TA locks up, writing to 
 * this register causes the parameter management to abort 
 * the frame (according to TA Render ID) which the TA is 
 * working on and free all the memory that it has thus 
 * allocated. This register should only be used when a TA 
 * is in progress. Suggested usage would be to reset the TA,
 * then write to this register.
*/
#define MBX1_TAGLOBREG_EVM_TA_TIMEOUT			0x00000834
#define MBX1_TA_EVM_TA_TIMEOUT_SHIFT			0
#define MBX1_TA_EVM_TA_TIMEOUT_MASK				0xFFFFFFFF

/*
 * Event Manager Init (Write Only)
 * This register initialises the event manager, as though
 * it has contiguous memory to address EVM_LIST_BASE, and
 * loads EVM_LIST_START and EVM_LIST_END. This register 
 * should only be used at start of day to initialise the
 * parameter management. Use of this register when either 
 * the 3D core or the TA is active is NOT recommended and
 * will result in undefined behaviour.
 */
#define MBX1_TAGLOBREG_EVM_INIT					0x00000838
#define MBX1_TA_EVM_INIT_SHIFT					0
#define MBX1_TA_EVM_INIT_MASK					0xFFFFFFFF

/*
 * TA Object Base Address
 * This register contains the base address of the object 
 * data as seen by the 3D core. This address must be lower
 * than the lowest page in memory used by the parameter 
 * management. This register is subtracted from the object
 * start address, and the resulting value is inserted into 
 * the object pointer. As the range of the object parameters
 * is limited to 8MB the highest page value used by the
 * parameter management cannot be more than 8 MB from this
 * address.
 */
#define MBX1_TAGLOBREG_OBJDATABASE				0x0000083C
#define MBX1_TA_OBJDATABASE_SHIFT				12
#define MBX1_TA_OBJDATABASE_MASK				0x01FFF000
#define MBX1_TA_OBJDATABASE_ALIGNMASK			0x00000FFF
#define MBX1_ADDRGRAN_OBJBASE					0x00001000

#define MBX1_ADDRRANGE_PARAMDATA				(8 * 1024 * 1024)

/*
 * TA Tail Pointer Base Address
 * The TA has a cache of the next address to be written to
 * for each pointer list. This cache needs an area of memory
 * (1 Dword/Tile) with which to page in and out data. Note 
 * that as this address Is twiddled by interleaving the X & Y
 * tile bits, (y(0) is the LSB) the relationship between memory
 * required and number of tiles is not 1:1. Twiddling greatly 
 * improves the efficiency of the cache. At the start of each
 * frame this is initialised by writing all zeros into this 
 * memory, and flushing the cache.
 */
#define	MBX1_TAGLOBREG_TAILPTRBASE				0x00000840

#if defined(SUPPORT_MBX1_LITE)

	#if defined(MBX1_LITE_REV00)
		#define MBX1_TA_TAILPTRBASE_SHIFT		17
		#define MBX1_TA_TAILPTRBASE_MASK		0x01FE0000
		#define MBX1_ADDRGRAN_TAILPTR			0x20000
	#else /* if defined(MBX1_LITE_REV00) */
		#define MBX1_TA_TAILPTRBASE_SHIFT		8
		#define MBX1_TA_TAILPTRBASE_MASK		0x01FFFF00
		#define MBX1_ADDRGRAN_TAILPTR			0x100
	#endif

#else	/* #if defined(SUPPORT_MBX1_LITE) */

	#define MBX1_TA_TAILPTRBASE_SHIFT			16
	#define MBX1_TA_TAILPTRBASE_MASK			0x01FF0000
	#define MBX1_ADDRGRAN_TAILPTR				0x10000

#endif	/* #if defined(SUPPORT_MBX1_LITE) */

/* Last address and empty tile bits in tail pointer. */
#define MBX1_TA_TAILPTR_FIRST_ADDRINDEX_MASK	0x0F000000
#define MBX1_TA_TAILPTR_FIRST_ADDRINDEX_SHIFT	24
#define MBX1_TA_TAILPTR_LAST_ADDRINDEX_MASK		0x0000000F
#define MBX1_TA_TAILPTR_LAST_ADDRINDEX_SHIFT	0
#define MBX1_TA_TAILPTR_VALID_TILE_MASK			0x00800000
#define MBX1_TA_TAILPTR_VALID_TILE_SHIFT		23
#define MBX1_TA_TAILPTR_EMPTY_TILE_MASK			0x00000000
#define MBX1_TA_TAILPTR_ADDR_MASK				0x007FFFFF
#define MBX1_TA_TAILPTR_ADDR_SHIFT				0

/*
 * TA Region Base Address
 * The region base address for the TA writing regions
 * automatically into memory.
 */
#define MBX1_TAGLOBREG_REGION_BASE				0x00000844
#define MBX1_TA_REGION_BASE_SHIFT				2
#define MBX1_TA_REGION_BASE_MASK				0x01FFFFFC
#define MBX1_ADDRGRAN_RGNPTR					0x00000004

/*
 * Global List Control:
 */
#define MBX1_TAGLOBREG_GLOBAL_LIST_CTRL			0x00000848
#define MBX1_TA_GLOBAL_LIST_CTRL_OBJSIZE_MASK	0x00007FFF
#define MBX1_TA_GLOBAL_LIST_CTRL_MAXOBJS_SHIFT	16
#define MBX1_TA_GLOBAL_LIST_CTRL_MAXOBJS_MASK	0x00FF0000
/*
 * TA Screen X,Y clipping control bits.
 */
#define MBX1_TAGLOBREG_XCLIP					0x0000084C
#define MBX1_TA_XCLIPMINCLR						0xFFFFF800
#define MBX1_TA_XCLIPMINSHIFT					0
#define MBX1_TA_XCLIPMAXCLR						0xF800FFFF
#define MBX1_TA_XCLIPMAXSHIFT					16

#define MBX1_TAGLOBREG_YCLIP					0x00000850
#define MBX1_TA_YCLIPMINCLR						0xFFFFF800
#define MBX1_TA_YCLIPMINSHIFT					0
#define MBX1_TA_YCLIPMAXCLR						0xF800FFFF
#define MBX1_TA_YCLIPMAXSHIFT					16

/*
 * TA RHW Clamp
 * An IEEE float value (only exponent bits are used
 * - i.e. always a power of 2) used to clamp incoming
 * RHW values to a minimum
 */
#define MBX1_TAGLOBREG_RHWCLAMP					0x00000854
#define MBX1_TA_RHWCLAMP_SHIFT					0
#define MBX1_TA_RHWCLAMP_MASK					0x7FFFFFF0

/*
 * TA RHW Compare
 * This truncated IEEE value is tested against the RHW 
 * of an incoming object and if RHW is less than this,
 * it is clamped to the clamp value. Note that the sign
 * bit on the RHW is thrown away.
 */
#define MBX1_TAGLOBREG_RHWCOMP					0x00000858
#define MBX1_TA_RHWCOMP_SHIFT					0
#define MBX1_TA_RHWCOMP_MASK					0x7FFFFFF0

/*
 * TA Configuration
 */
#define MBX1_TAGLOBREG_CONFIG					0x0000085C
#define MBX1_TACONFIG_SMALLOBJCULL				0x00000001
#define MBX1_TACONFIG_SUPERSAMPLEX				0x00000002
#define MBX1_TACONFIG_SUPERSAMPLEY				0x00000004
#define MBX1_TACONFIG_DEALLOC_GBL				0x00000008
#define MBX1_TACONFIG_INVERTBASEALPHA		   	0x00000010
#define MBX1_TACONFIG_INVERTOFFSETALPHA		   	0x00000020
#define MBX1_TACONFIG_PIXELCENTRE			   	0x00000040
#define MBX1_TACONFIG_COMPLETEONTERM		   	0x00000080
#define MBX1_TACONFIG_NO_INITIALISE			   	0x00000100
#define MBX1_TACONFIG_NO_DEALLOCATE			   	0x00000200
#define MBX1_TACONFIG_RENDERHEIGHTSHIFT		   	10
#define MBX1_TACONFIG_RENDERHEIGHTCLRMASK	   	0xFFFE03FF
#define MBX1_TACONFIG_ZLS_CTRL_CLRMASK			0xFFF3FFFF
#define MBX1_TACONFIG_ZLOAD						0x00040000
#define MBX1_TACONFIG_ZSTORE					0x00080000
#ifdef SUPPORT_MBX1_LITE
#define	MBX1_TACONFIG_RENDERWIDTHSHIFT		   	19
#else
#define	MBX1_TACONFIG_RENDERWIDTHSHIFT		   	20
#endif
#define MBX1_TACONFIG_RENDERWIDTHCLRMASK	   	0xF80FFFFF
#define MBX1_TACONFIG_REGION_GEN_CLRMASK	   	0xC7FFFFFF
#define MBX1_TACONFIG_REGION_DEFAULT		   	0x0L
#define MBX1_TACONFIG_REGION_TL2BR			   	0x08000000
#define MBX1_TACONFIG_REGION_TR2BL			   	0x10000000
#define MBX1_TACONFIG_REGION_BR2TL			   	0x18000000
#define MBX1_TACONFIG_REGION_BL2TR			   	0x20000000
#define MBX1_TACONFIG_DISABLESNAPPING			0x40000000
#define MBX1_TACONFIG_PT_DISABLE				0x80000000

/*
 * 3d Screen Size (Render)
 */
#define MBX1_GLOBREG_3DSCREENSIZE				0x00000860
#define MBX1_3DSCREENSIZE_RENDER_WIDTH_SHIFT	0
#define MBX1_3DSCREENSIZE_RENDER_WIDTH_MASK		0x00000070
#define MBX1_3DSCREENSIZE_RENDER_HEIGHT_SHIFT	16
#define MBX1_3DSCREENSIZE_RENDER_HEIGHT_MASK	0x00700000

/*
 * EVM Context Flush Base Address
 */
#define MBX1_TAGLOBREG_EVM_CONTEXT_FLUSH_ADDR	0x00000864
#define MBX1_CONTEXT_FLUSH_BASE_ADDR_MASK		0x01FFC000
#define MBX1_CONTEXT_FLUSH_BASE_ADDR_SHIFT		14
#define MBX1_ADDRGRAN_EVMCONTEXT				0x00004000
#define MBX1_EVMCONTEXT_FLUSH_SIZE				(65*8)

/*
	TA Slave Port
 */
#define MBX1_TA_SP_TERM_STRIP					0x00000000
#define MBX1_TA_SP_TERM_PRIM					0x00000000
#define MBX1_TA_SP_TERM_BLOCK					0x00000001

/****************************************************************************
 *																			*
 *	TA Parameter Definitions												*
 *																			*
 ****************************************************************************/
/*
 * Define some address granularity.
 */

/*
	EVM granularities
*/
#define MBX1_ADDRGRAN_FREEPAGE					(4*1024)

/*
	EVM reg count
*/
#define MBX1_EVM_REG_COUNT						6

/*
	Macrotile size /  max number
*/
#define MBX1_MAX_MACROTILES						65

#define MBX_MT_TILE_THRESHOLD_0					32
#define MBX_MT_TILE_THRESHOLD_1					64
#define MBX_MT_TILE_THRESHOLD_2					128
#define	MBX_MT_TILE_SIZE_0						4
#define	MBX_MT_TILE_SIZE_1						8
#define	MBX_MT_TILE_SIZE_2						16

/*
	Max Frame Contexts
*/
#define MBX1_MAX_FRAME_CONTEXTS					2  //  THIS IS WRONG - THERE IS NO LIMIT !!!!

/*
 * space reserved for Background Object
 */
#define MBX1_BGOBJDATA_SIZE						(132 * sizeof(DWORD))


/*****************************************************************************
 * Tile Accelerator - Object types
 *****************************************************************************/
#define MBX1_TAOBJTYPE_TYPECLRMASK				0x0FFFFFFF
#define MBX1_TAOBJTYPE_RESERVED0				0x00000000
#define MBX1_TAOBJTYPE_STATE					0x10000000
#define MBX1_TAOBJTYPE_RESERVED1				0x20000000
#define MBX1_TAOBJTYPE_RESERVED2				0x30000000
#define MBX1_TAOBJTYPE_VERTEXFACESTRIP			0x40000000
#define MBX1_TAOBJTYPE_VERTEXFACEFAN			0x50000000
#define MBX1_TAOBJTYPE_VERTEXLINESTRIP			0x60000000
#define MBX1_TAOBJTYPE_VERTEXFACELIST			0x70000000
#define MBX1_TAOBJTYPE_VGP_CONTROL				0x80000000
#define MBX1_TAOBJTYPE_VGP_CODE					0x90000000
#define MBX1_TAOBJTYPE_VGP_CONSTANTS			0xA0000000
#define MBX1_TAOBJTYPE_RESERVED8				0xB0000000
#define MBX1_TAOBJTYPE_RESERVED9				0xC0000000
#define MBX1_TAOBJTYPE_RESERVED10				0xD0000000
#define MBX1_TAOBJTYPE_POINTS					0xE0000000
#define MBX1_TAOBJTYPE_STREAMEND				0xF0000000

/*****************************************************************************
 * Tile Accelerator - State Block Header
 *****************************************************************************/
#define MBX1_TASTATEPRES_ISPCTL					0x00000001
#define MBX1_TASTATEPRES_TSPCTL					0x00000002
#define MBX1_TASTATEPRES_LAYER0CTL				0x00000004
#define MBX1_TASTATEPRES_LAYER1CTL				0x00000008
#define MBX1_TASTATEPRES_REGIONCLIP				0x00000010
#define MBX1_TASTATEPRES_FP_INPUTFORMAT			0x00000040
/* VGP specifics */
#define MBX1_TASTATEPRES_VGP_IFDEFINITION		0x00000020
#define MBX1_TASTATEPRES_VGP_VIEWPORTTRANS		0x00000080
#define MBX1_TASTATEPRES_VGP_WCLAMPVAL			0x00000100
#define MBX1_TASTATEPRES_VGP_PROCVERTADDRESS	0x00000200
#define MBX1_TASTATEPRES_VGP_PROCVERTSELECTS	0x00000400
#define MBX1_TASTATEPRES_VGP_PROCVERTENABLE		0x00000800

#define MBX1_TASTATEPRES_CLRMASK				0xFFFFF000

/*****************************************************************************
 * Tile Accelerator - Region clip control word
 *****************************************************************************/
#define MBX1_TASTATERGNCLIP_CLIPMASK			0x0000007F

#define MBX1_TASTATERGNCLIP_UNITSIZE			16
#define MBX1_TASTATERGNCLIP_UNITSHIFT			4

#define MBX1_TASTATERGNCLIP_LEFTCLIPSHIFT		21
#define MBX1_TASTATERGNCLIP_LEFTCLIPCLRMASK		0xF01FFFFF

#define MBX1_TASTATERGNCLIP_RIGHTCLIPSHIFT		14
#define MBX1_TASTATERGNCLIP_RIGHTCLIPCLRMASK	0xFFE03FFF

#define MBX1_TASTATERGNCLIP_TOPCLIPSHIFT		7
#define MBX1_TASTATERGNCLIP_TOPCLIPCLRMASK		0xFFFFC07F

#define MBX1_TASTATERGNCLIP_BOTTOMCLIPSHIFT		0
#define MBX1_TASTATERGNCLIP_BOTTOMCLIPCLRMASK 	0xFFFFFF80

#define MBX1_TASTATERGNCLIP_CLIPSHIFT			28
#define MBX1_TASTATERGNCLIP_CLIPCLRMASK		 	0xCFFFFFFF
#define MBX1_TASTATERGNCLIP_CLIPNONE		 	0x00000000
#define MBX1_TASTATERGNCLIP_CLIPALL		 		0x10000000
#define MBX1_TASTATERGNCLIP_CLIPOUTSIDE		 	0x20000000