📄 mbx13ddef.h
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#define MBX1_TSPPL1_TEXPARAMCLRMASK MBX1_TSPPL1_TUSIZECLRMASK & \
MBX1_TSPPL1_TVSIZECLRMASK & \
MBX1_TSPPL1_TPIXFORMCLRMASK & \
MBX1_TSPPL1_MIPMAPCLAMPCLRMASK
/*****************************************************************************
* TSP Per Layer control 2
*****************************************************************************/
#define MBX1_TSPPL2_MAPFILTERENABLESHIFT 31
#define MBX1_TSPPL2_MAPFILTERENABLE 0x80000000
#define MBX1_TSPPL2_MIPCTLSHIFT 29
#define MBX1_TSPPL2_MIPCTLCLRMASK 0x9FFFFFFF
#define MBX1_TSPPL2_MIPCTLNOTMIPMAP 0x00000000
#define MBX1_TSPPL2_MIPCTLNOMIPFILTER 0x20000000
#define MBX1_TSPPL2_MIPCTLMIPFILTER 0x40000000
#define MBX1_TSPPL2_MIPCTLTOPMAP 0x60000000
#define MBX1_TSPPL2_DADJUSTSHIFT 25
#define MBX1_TSPPL2_DADJUSTCLRMASK 0xE1FFFFFF
#define MBX1_TSPPL2_TEXSTRIDESHIFT 18
#define MBX1_TSPPL2_TEXSTRIDECLRMASK 0xFE03FFFF
/* <KINGYO> - DO NOT REMOVE THIS LINE!!! */
#define MBX1_TSPPL2_TEXSTRIDECLRMASK_KINGYO 0xFFFFFFFF
/* </KINGYO> - DO NOT REMOVE THIS LINE!!! */
#define MBX1_TSPPL2_TEXSTRIDEUNITSHIFT 4
#define MBX1_TSPPL2_TEXADDRSHIFT 0
#define MBX1_TSPPL2_TEXADDRCLRMASK 0xFFFC0000
/* <KINGYO> - DO NOT REMOVE THIS LINE!!! */
#define MBX1_TSPPL2_TEXADDRCLRMASK_KINGYO 0xFFE00000
/* </KINGYO> - DO NOT REMOVE THIS LINE!!! */
#define MBX1_TSPPL2_TEXADDRALIGNSHIFT 7
#define MBX1_TSPPL2_TEXADDRALIGNSIZE 128
#define MBX1_TSPPL2_TEXPARAMCLRMASK MBX1_TSPPL2_TEXSTRIDECLRMASK & \
MBX1_TSPPL2_TEXADDRCLRMASK
/*****************************************************************************
* TSP Per Layer control 3
*****************************************************************************/
#define MBX1_TSPPL3_COPCLRMASK 0x00007FFF
#define MBX1_TSPPL3_AOPCLRMASK 0xFFFF8000
#define MBX1_TSPPL3_CS1SELSHIFT 30
#define MBX1_TSPPL3_CS1SELCLRMASK 0x3FFFFFFF
#define MBX1_TSPPL3_CS1SELFACTOR 0x00000000
#define MBX1_TSPPL3_CS1SELCURRENT 0x40000000
#define MBX1_TSPPL3_CS1SELTEXTURE 0x80000000
#define MBX1_TSPPL3_CS1SELONE 0xC0000000
#define MBX1_TSPPL3_CS2SELSHIFT 27
#define MBX1_TSPPL3_CS2SELCLRMASK 0xC7FFFFFF
#define MBX1_TSPPL3_CS2SELDIFFUSE 0x00000000
#define MBX1_TSPPL3_CS2SELCURRENT 0x08000000
#define MBX1_TSPPL3_CS2SELTEXTURE 0x10000000
#define MBX1_TSPPL3_CS2SELFACTOR 0x18000000
#define MBX1_TSPPL3_CS2SELDIFFUSEALPHA 0x20000000
#define MBX1_TSPPL3_CS2SELCURRENTALPHA 0x28000000
#define MBX1_TSPPL3_CS2SELTEXTUREALPHA 0x30000000
#define MBX1_TSPPL3_CS2SELFACTORALPHA 0x38000000
#define MBX1_TSPPL3_CS3SELSHIFT 25
#define MBX1_TSPPL3_CS3SELCLRMASK 0xF9FFFFFF
#define MBX1_TSPPL3_CS3SELDIFFUSE 0x00000000
#define MBX1_TSPPL3_CS3SELCURRENT 0x02000000
#define MBX1_TSPPL3_CS3SELTEXTURE 0x04000000
#define MBX1_TSPPL3_CS3SELONE 0x06000000
#define MBX1_TSPPL3_CS4SELSHIFT 22
#define MBX1_TSPPL3_CS4SELCLRMASK 0xFE3FFFFF
#define MBX1_TSPPL3_CS4SELDIFFUSE 0x00000000
#define MBX1_TSPPL3_CS4SELCURRENT 0x00400000
#define MBX1_TSPPL3_CS4SELTEXTURE 0x00800000
#define MBX1_TSPPL3_CS4SELFACTOR 0x00C00000
#define MBX1_TSPPL3_CS4SELDIFFUSEALPHA 0x01000000
#define MBX1_TSPPL3_CS4SELCURRENTALPHA 0x01400000
#define MBX1_TSPPL3_CS4SELTEXTUREALPHA 0x01800000
#define MBX1_TSPPL3_CS4SELFACTORALPHA 0x01C00000
#define MBX1_TSPPL3_CS4SELCSUMX4 0x00400000
#define MBX1_TSPPL3_CS4SELREPLICATEALPHA 0x00800000
#define MBX1_TSPPL3_INVCS1SHIFT 21
#define MBX1_TSPPL3_INVCS1 0x00200000
#define MBX1_TSPPL3_INVCS2SHIFT 20
#define MBX1_TSPPL3_INVCS2 0x00100000
#define MBX1_TSPPL3_INVCS3SHIFT 19
#define MBX1_TSPPL3_INVCS3 0x00080000
#define MBX1_TSPPL3_INVCS4SHIFT 18
#define MBX1_TSPPL3_INVCS4 0x00040000
#define MBX1_TSPPL3_COFFSHIFT 17
#define MBX1_TSPPL3_COFF 0x00020000
#define MBX1_TSPPL3_CBEOPSHIFT 15
#define MBX1_TSPPL3_CBEOPCLRMASK 0xFFFE7FFF
#define MBX1_TSPPL3_CBEOP1X 0x00000000
#define MBX1_TSPPL3_CBEOP2X 0x00008000
#define MBX1_TSPPL3_CBEOP4X 0x00010000
#define MBX1_TSPPL3_CBEOPINV 0x00018000
#define MBX1_TSPPL3_AS1SELSHIFT 13
#define MBX1_TSPPL3_AS1SELCLRMASK 0xFFFF9FFF
#define MBX1_TSPPL3_AS1SELDIFFUSEALPHA 0x00000000
#define MBX1_TSPPL3_AS1SELCURRENTALPHA 0x00002000
#define MBX1_TSPPL3_AS1SELTEXTUREALPHA 0x00004000
#define MBX1_TSPPL3_AS1SELONE 0x00006000
#define MBX1_TSPPL3_AS2SELSHIFT 11
#define MBX1_TSPPL3_AS2SELCLRMASK 0xFFFFE7FF
#define MBX1_TSPPL3_AS2SELDIFFUSEALPHA 0x00000000
#define MBX1_TSPPL3_AS2SELCURRENTALPHA 0x00000800
#define MBX1_TSPPL3_AS2SELTEXTUREALPHA 0x00001000
#define MBX1_TSPPL3_AS2SELFACTORALPHA 0x00001800
#define MBX1_TSPPL3_AS3SELSHIFT 9
#define MBX1_TSPPL3_AS3SELCLRMASK 0xFFFFF9FF
#define MBX1_TSPPL3_AS3SELDIFFUSEALPHA 0x00000000
#define MBX1_TSPPL3_AS3SELCURRENTALPHA 0x00000200
#define MBX1_TSPPL3_AS3SELTEXTUREALPHA 0x00000400
#define MBX1_TSPPL3_AS3SELONE 0x00000600
#define MBX1_TSPPL3_AS4SELSHIFT 7
#define MBX1_TSPPL3_AS4SELCLRMASK 0xFFFFFE7F
#define MBX1_TSPPL3_AS4SELDIFFUSEALPHA 0x00000000
#define MBX1_TSPPL3_AS4SELCURRENTALPHA 0x00000080
#define MBX1_TSPPL3_AS4SELTEXTUREALPHA 0x00000100
#define MBX1_TSPPL3_AS4SELFACTORALPHA 0x00000180
#define MBX1_TSPPL3_INVAS1SHIFT 6
#define MBX1_TSPPL3_INVAS1 0x00000040
#define MBX1_TSPPL3_INVAS2SHIFT 5
#define MBX1_TSPPL3_INVAS2 0x00000020
#define MBX1_TSPPL3_INVAS3SHIFT 4
#define MBX1_TSPPL3_INVAS3 0x00000010
#define MBX1_TSPPL3_INVAS4SHIFT 3
#define MBX1_TSPPL3_INVAS4 0x00000008
#define MBX1_TSPPL3_AOFFSHIFT 2
#define MBX1_TSPPL3_AOFF 0x00000004
#define MBX1_TSPPL3_ABEOPSHIFT 0
#define MBX1_TSPPL3_ABEOPCLRMASK 0xFFFFFFFC
#define MBX1_TSPPL3_ABEOP1X 0x00000000
#define MBX1_TSPPL3_ABEOP2X 0x00000001
#define MBX1_TSPPL3_ABEOP4X 0x00000002
#define MBX1_TSPPL3_ABEOPINV 0x00000003
#define MBX1_TSPPL3_CARGCLRMASK MBX1_TSPPL3_CS1SELCLRMASK & \
MBX1_TSPPL3_CS2SELCLRMASK & \
MBX1_TSPPL3_CS3SELCLRMASK & \
MBX1_TSPPL3_CS4SELCLRMASK
#define MBX1_TSPPL3_AARGCLRMASK MBX1_TSPPL3_AS1SELCLRMASK & \
MBX1_TSPPL3_AS2SELCLRMASK & \
MBX1_TSPPL3_AS3SELCLRMASK & \
MBX1_TSPPL3_AS4SELCLRMASK
/*
* optional logical ops
*/
#define MBX1_TSPPL3_LO_MASK 0x0000003F
#define MBX1_TSPPL3_LO_SHIFT 0
#define MBX1_TSPPL3_LO_CLEAR 0x00000030
#define MBX1_TSPPL3_LO_AND 0x00000031
#define MBX1_TSPPL3_LO_AND_REVERSE 0x00000032
#define MBX1_TSPPL3_LO_COPY 0x00000033
#define MBX1_TSPPL3_LO_AND_INVERSE 0x00000034
#define MBX1_TSPPL3_LO_NOOP 0x00000035
#define MBX1_TSPPL3_LO_XOR 0x00000036
#define MBX1_TSPPL3_LO_OR 0x00000037
#define MBX1_TSPPL3_LO_NOR 0x00000038
#define MBX1_TSPPL3_LO_EQUIV 0x00000039
#define MBX1_TSPPL3_LO_INVERT 0x0000003A
#define MBX1_TSPPL3_LO_OR_REVERSE 0x0000003B
#define MBX1_TSPPL3_LO_COPY_INVERSE 0x0000003C
#define MBX1_TSPPL3_LO_OR_INVERSE 0x0000003D
#define MBX1_TSPPL3_LO_NAND 0x0000003E
#define MBX1_TSPPL3_LO_SET 0x0000003F
/****************************************************************************
* *
* Tile Accelerator Definitions *
* *
****************************************************************************/
/*****************************************************************************
*Tile Accelerator - Registers
*****************************************************************************/
/*
* Start (wo)
* Kicks off the pointer allocation
* module with in the tile accelerator.
*/
#define MBX1_TAGLOBREG_START 0x00000800
#define MBX1_TA_START_SHIFT 0
#define MBX1_TA_START_MASK 0xFFFFFFFF
/*
* Restart (wo)
* After a TA abort cycle is complete,
* a write to this register tells the TA
* to continue processing the input data.
*/
#define MBX1_TAGLOBREG_RESTART 0x00000804
#define MBX1_TA_RESTART_SHIFT 0
#define MBX1_TA_RESTART_MASK 0xFFFFFFFF
/*
* Abort (wo)
* Causes the TA to issue an abort cycle.
* An abort cycle causes the tile accelerator
* to finishes processing the current object for
* the current macro tile, and then terminate the
* macro tile as specified in the TA_ABORTXY register.
* After this action is complete a TA error event
* occurs. Note that in the instance that this is
* the last object, and the last macro tile for this
* object. A TA finished event will occur instead,
* and all tiles will be terminated.
*/
#define MBX1_TAGLOBREG_ABORT 0x00000808
#define MBX1_TA_ABORT_SHIFT 0
#define MBX1_TA_ABORT_MASK 0xFFFFFFFF
/*
* Abort X,Y
* The x/y address of the macro tile (128 pixels wide)
* to be terminate during an abort cycle
*/
#define MBX1_TAGLOBREG_ABORTXY 0x0000080C
#define MBX1_TA_ABORTX_SHIFT 17
#define MBX1_TA_ABORTX_MASK 0x000E0000
#define MBX1_TA_ABORTY_SHIFT 0
#define MBX1_TA_ABORTY_MASK 0x00000007
/*
* Render ID
* The parameter management keeps track of 3 independent
* frames. In order to allocate memory to the TA on a
* particular frame, it is necessary to know which frame
* it is rendering. Valid values for this register are
* therefore 0,1,2. This value is also used as the frame
* to free in a TA_TIMEOUT operation
*/
#define MBX1_TAGLOBREG_RENDER_ID 0x00000810
#define MBX1_TA_RENDER_ID 0x00000001
/*
* Load Context (wo)
* This register can only be used when the tile accelerator
* is idle. Writing to this register causes a frame context
* to be loaded from the context base address. The context
* consists of the next free address for every macro tile.
*/
#define MBX1_TAGLOBREG_CONTEXT_LOAD 0x00000814
#define MBX1_TA_CONTEXT_LOAD_SHIFT 0
#define MBX1_TA_CONTEXT_LOAD_MASK 0xFFFFFFFF
/*
* Store Context (wo)
* This register can only be used when the tile accelerator
* is idle. Writing to this register causes a frame context
* to be stored to the context base address. The context
* consists of the next free address for every macro tile.
*/
#define MBX1_TAGLOBREG_CONTEXT_STORE 0x00000818
#define MBX1_TA_CONTEXT_STORE_SHIFT 0
#define MBX1_TA_CONTEXT_STORE_MASK 0xFFFFFFFF
/*
Reset Context (wo)
This register can only be used when the tile accelerator
is idle. Writing to this register causes the TA internal
frame context to be initialised as though no blocks are
currently allocated to the TA. This needs to be done
before the start of every new frame. The context consists
of the next free address for every macro tile.
*/
#define MBX1_TAGLOBREG_CONTEXT_RESET 0x0000081C
#define MBX1_TA_CONTEXT_RESET_SHIFT 0
#define MBX1_TA_CONTEXT_RESET_MASK 0xFFFFFFFF
/*
* Context Base
* A byte aligned register containing the base address
* for the context to be loaded and stored from/to.
* The context consists of the next free address for
* every macro tile.
*/
#define MBX1_TAGLOBREG_CONTEXT_BASE 0x00000820
#if defined(SUPPORT_MBX1_LITE)
#define MBX1_TACONTEXT_SIZE 4
#if defined(MBX1_LITE_REV00)
#define MBX1_TA_CONTEXT_BASE_SHIFT 9
#define MBX1_TA_CONTEXT_BASE_MASK 0x01FFFE00
#define MBX1_ADDRGRAN_TACONTEXT 0x00000200
#else /* defined(MBX1_LITE_REV00) */
#define MBX1_TA_CONTEXT_BASE_SHIFT 8
#define MBX1_TA_CONTEXT_BASE_MASK 0x01FFFF00
#define MBX1_ADDRGRAN_TACONTEXT 0x00000100
#endif
#else /* defined(SUPPORT_MBX1_LITE) */
#define MBX1_TACONTEXT_SIZE (65*4)
#define MBX1_TA_CONTEXT_BASE_SHIFT 9
#define MBX1_TA_CONTEXT_BASE_MASK 0x01FFFE00
#define MBX1_ADDRGRAN_TACONTEXT 0x00000200
#endif
/*
* Event Manager Page Table Base Address
* A byte aligned register containing the base address for
* the page list which the event manager stored the current
* state of the memory allocation. This table is automatically
* initialised as though a block of contiguous memory has been
* allocated to it when the evm_init register is written to.
* This data can be over-ridden when the evm_finished event
* occurs. This initialisation needs only to occur at start
* of day. After this point no more intervention should be
* required. If this table is altered by the driver whilst
* TA operation is in progress, the behaviour is undefined.
*/
#define MBX1_TAGLOBREG_EVM_PAGETBL_BASE 0x00000824
#define MBX1_TA_EVM_PAGETBL_GRAN 0x00001000/* 4k per page */
#define MBX1_FREEPAGELIST_MAX_ENTRIES (8*1024)
#define MBX1_FREEPAGELIST_ENTRY_SIZE 2
#if defined(SUPPORT_MBX1_LITE)
#if defined(MBX1_LITE_REV00)
#define MBX1_TA_EVM_PAGETBL_BASE_SHIFT 14
#define MBX1_TA_EVM_PAGETBL_BASE_MASK 0x01FFC000
#define MBX1_ADDRGRAN_FREEPAGELIST 0x00004000
#else /* defined(MBX1_LITE_REV00) */
#define MBX1_TA_EVM_PAGETBL_BASE_SHIFT 8
#define MBX1_TA_EVM_PAGETBL_BASE_MASK 0x01FFFF00
#define MBX1_ADDRGRAN_FREEPAGELIST 0x00000100
#endif
#else /* defined(SUPPORT_MBX1_LITE) */
#define MBX1_TA_EVM_PAGETBL_BASE_SHIFT 14
#define MBX1_TA_EVM_PAGETBL_BASE_MASK 0x01FFC000
#define MBX1_ADDRGRAN_FREEPAGELIST 0x00004000
#endif
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