freq.s

Lido PXA270平台开发板的最新BSP,包括源代码

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;
;------------------------------------------------------------------------------
;
;   File:  freq.s
;
;   Kernel startup routine for the Emdoor XSBASE270_G board.
;
;------------------------------------------------------------------------------

    INCLUDE kxarm.h
    INCLUDE XSBASE270_G.inc
    INCLUDE xlli_bulverde_defs.inc

    IMPORT xlli_GPIO_init
    IMPORT xlli_setClocks
    IMPORT xlli_freq_change
    
    TEXTAREA

;-------------------------------------------------------------------------------
;
; OALXScaleSetFrequencies: Configures the Bulverde core and memory clock
;                          frequencies.
;
; Inputs: None.
; 
; On return: N/A.
;
; Register used: r9
;
;-------------------------------------------------------------------------------
;
    ALIGN
    NESTED_ENTRY OALXScaleSetFrequencies
    ; TODO - we don't have a stack yet, but need to save the caller's return address...
    mov r9, lr
    PROLOG_END

    bl      xlli_GPIO_init 

    ; Route the 32768 Hz Oscillator to the RTC, and provide for
    ; trimming the accuracy of that crystal.

    ldr	r1, =xlli_CLKREGS_PHYSICAL_BASE    ; OSCC = OON | CRI
    mov	r2, #(xlli_OSCC_OON :OR: xlli_OSCC_CRI)
    str	r2, [r1, #xlli_OSCC_offset]

    ; Trim the RTC accuracy. If it uses the 13 MHz clock as the reference
    ; frequency, this is required since it divides down by 400 to 32500,
    ; not 32768.
    ; If it uses the actual watch crystal, it should be 32768 +- the error,
    ; and may or may not be required. Some empirical timing over an hour
    ; on a XSBASE270_G revealed an 8 second gain. Calculating that error,
    ; we get 32836 Hz. This is not unreasonable for an uncalibrated
    ; watch crystal, and is probably pretty typical of that board due to
    ; parasitic capacitance in the layout, not the actual crystal.

ACTUAL_CRYSTAL_FREQ	EQU	32836	; Measured frequency may or may not be 32768

    ldr	r1, =xlli_RTCREGS_PHYSICAL_BASE
    ldr	r2, =ACTUAL_CRYSTAL_FREQ - 1            ; Load the crystals actual frequency - 1
    str	r2, [r1, #xlli_RTTR_offset]             ; Store this in the RTC Trim Register

    bl      xlli_setClocks

    bl      xlli_freq_change

    mov     lr, r9

  IF Interworking :LOR: Thumbing
    bx  lr
  ELSE
    mov  pc, lr          ; return
  ENDIF
 
    ENTRY_END
    
    END 

;------------------------------------------------------------------------------