xllp_lcd.c

Lido PXA270平台开发板的最新BSP,包括源代码

	}

	XllpUnlock(LockID);

	LockID = XllpLock(GPDR1);
	p_GPIORegs->GPDR1 |= ( XLLP_GPIO_BIT_L_DD0 | XLLP_GPIO_BIT_L_DD1 | XLLP_GPIO_BIT_L_DD2 | XLLP_GPIO_BIT_L_DD3 | XLLP_GPIO_BIT_L_DD4 | XLLP_GPIO_BIT_L_DD5);

	// Set GPIO 38 and 40 as outputs
	#if defined XLLP_GPIO_BIT_SSPTXD3 && XLLP_GPIO_BIT_SSPCLK3
		if (pXllpLCD->DisplayType == LS022Q8DD06)
		{
			p_GPIORegs->GPDR1 |= (XLLP_GPIO_BIT_SSPTXD3 | XLLP_GPIO_BIT_SSPCLK3);
		}
	#endif

	XllpUnlock(LockID);

	LockID = XllpLock(GPDR2);

	if (pXllpLCD->DisplayType != LS022Q8DD06)
	{
		p_GPIORegs->GPDR2 |= (	XLLP_GPIO_BIT_L_DD6 | XLLP_GPIO_BIT_L_DD7 | XLLP_GPIO_BIT_L_DD8 | XLLP_GPIO_BIT_L_DD9 | XLLP_GPIO_BIT_L_DD10 | 
							XLLP_GPIO_BIT_L_DD11 | XLLP_GPIO_BIT_L_DD12 | XLLP_GPIO_BIT_L_DD13 | XLLP_GPIO_BIT_L_DD14 | XLLP_GPIO_BIT_L_DD15 |
							XLLP_GPIO_BIT_L_FCLK | XLLP_GPIO_BIT_L_LCLK | XLLP_GPIO_BIT_L_PCLK | XLLP_GPIO_BIT_L_BIAS | XLLP_GPIO_BIT_L_DD16 | 
							XLLP_GPIO_BIT_L_DD17);
	} else 
	{
		p_GPIORegs->GPDR2 |= (	XLLP_GPIO_BIT_L_DD6 | XLLP_GPIO_BIT_L_DD7 | XLLP_GPIO_BIT_L_DD8 | XLLP_GPIO_BIT_L_DD9 | XLLP_GPIO_BIT_L_DD10 | 
							XLLP_GPIO_BIT_L_DD11 | XLLP_GPIO_BIT_L_DD12 | XLLP_GPIO_BIT_L_DD13 | XLLP_GPIO_BIT_L_DD14 | XLLP_GPIO_BIT_L_DD15 |
							XLLP_GPIO_BIT_L_FCLK | XLLP_GPIO_BIT_L_LCLK | XLLP_GPIO_BIT_L_PCLK | XLLP_GPIO_BIT_L_BIAS );

		#if defined XLLP_GPIO_BIT_SSPRXD3
			// Set GPIO 89 as input		
			p_GPIORegs->GPDR2 &= ~(XLLP_GPIO_BIT_SSPRXD3);
		#endif
	}
	
	XllpUnlock(LockID);

	if (pXllpLCD->DisplayType != LS022Q8DD06)
	{
		// Program the GAFR0_L to select alternate function 1 for GPIO 14.
		LockID = XllpLock(GAFR0_L);
		p_GPIORegs->GAFR0_L = (p_GPIORegs->GAFR0_L & ~XLLP_GPIO_AF_BIT_L_VSYNC_MASK) | (XLLP_GPIO_AF_BIT_L_VSYNC);
		XllpUnlock(LockID);

		// Program the GAFR0_U to select alternate function 2 for GPIO 19.
		LockID = XllpLock(GAFR0_U);
		p_GPIORegs->GAFR0_U = (p_GPIORegs->GAFR0_U & ~XLLP_GPIO_AF_BIT_L_CS_MASK) | (XLLP_GPIO_AF_BIT_L_CS);
		XllpUnlock(LockID);
	}

	if (pXllpLCD->DisplayType == LS022Q8DD06)
	{
		#if defined XLLP_GPIO_AF_BIT_SSPTXD3_MASK && XLLP_GPIO_AF_BIT_SSPCLK3_MASK && XLLP_GPIO_AF_BIT_SSPTXD3 && XLLP_GPIO_AF_BIT_SSPCLK3
			// Program the GAFR1_L to select alternate function 1 for GPIO 38, 40.
			LockID = XllpLock(GAFR1_L);
			p_GPIORegs->GAFR1_L = (p_GPIORegs->GAFR1_L & ~(XLLP_GPIO_AF_BIT_SSPTXD3_MASK | XLLP_GPIO_AF_BIT_SSPCLK3_MASK)) | 
					(XLLP_GPIO_AF_BIT_SSPTXD3 | XLLP_GPIO_AF_BIT_SSPCLK3);
			XllpUnlock(LockID);
		#endif
	}

	// Program the GAFR1_U to select alternate function 2 for GPIO 58 through 63.
	LockID = XllpLock(GAFR1_U);
	p_GPIORegs->GAFR1_U = (p_GPIORegs->GAFR1_U & ~(XLLP_GPIO_AF_BIT_L_DD0_MASK | XLLP_GPIO_AF_BIT_L_DD1_MASK | XLLP_GPIO_AF_BIT_L_DD2_MASK|
												   XLLP_GPIO_AF_BIT_L_DD3_MASK | XLLP_GPIO_AF_BIT_L_DD4_MASK | XLLP_GPIO_AF_BIT_L_DD5_MASK)) | 
												  (XLLP_GPIO_AF_BIT_L_DD0 | XLLP_GPIO_AF_BIT_L_DD1 | XLLP_GPIO_AF_BIT_L_DD2 | 
												   XLLP_GPIO_AF_BIT_L_DD3 | XLLP_GPIO_AF_BIT_L_DD4 | XLLP_GPIO_AF_BIT_L_DD5 );
	XllpUnlock(LockID);

	// Program the GAFR2_L to select alternate function 2 for GPIO 64 through 77.
	LockID = XllpLock(GAFR2_L);
	p_GPIORegs->GAFR2_L = (p_GPIORegs->GAFR2_L & ~(XLLP_GPIO_AF_BIT_L_DD6_MASK	| XLLP_GPIO_AF_BIT_L_DD7_MASK	| XLLP_GPIO_AF_BIT_L_DD8_MASK	|
												   XLLP_GPIO_AF_BIT_L_DD9_MASK	| XLLP_GPIO_AF_BIT_L_DD10_MASK	| XLLP_GPIO_AF_BIT_L_DD11_MASK	|
												   XLLP_GPIO_AF_BIT_L_DD12_MASK | XLLP_GPIO_AF_BIT_L_DD13_MASK	| XLLP_GPIO_AF_BIT_L_DD14_MASK	|
												   XLLP_GPIO_AF_BIT_L_DD15_MASK | XLLP_GPIO_AF_BIT_L_FCLK_RD_MASK | XLLP_GPIO_AF_BIT_L_LCLK_A0_MASK |
												   XLLP_GPIO_AF_BIT_L_PCLK_WR_MASK | XLLP_GPIO_AF_BIT_L_BIAS_MASK)) |
												  (XLLP_GPIO_AF_BIT_L_DD6	| XLLP_GPIO_AF_BIT_L_DD7	| XLLP_GPIO_AF_BIT_L_DD8	| 
												   XLLP_GPIO_AF_BIT_L_DD9 	| XLLP_GPIO_AF_BIT_L_DD10	| XLLP_GPIO_AF_BIT_L_DD11	| 
												   XLLP_GPIO_AF_BIT_L_DD12	| XLLP_GPIO_AF_BIT_L_DD13	| XLLP_GPIO_AF_BIT_L_DD14	| 
												   XLLP_GPIO_AF_BIT_L_DD15	| XLLP_GPIO_AF_BIT_L_FCLK_RD| XLLP_GPIO_AF_BIT_L_LCLK_A0|
												   XLLP_GPIO_AF_BIT_L_PCLK_WR	| XLLP_GPIO_AF_BIT_L_BIAS ); 
	if (pXllpLCD->DisplayType == LS022Q8DD06)
	{
		p_GPIORegs->GAFR2_L = (p_GPIORegs->GAFR2_L & ~XLLP_GPIO_AF_BIT_L_BIAS_MASK); 
	}

	XllpUnlock(LockID);


	if (pXllpLCD->DisplayType != LS022Q8DD06)
	{
		// Program the GAFR2_U to select alternate function 2 for GPIO 86, 87.
		LockID = XllpLock(GAFR2_U);
		p_GPIORegs->GAFR2_U = (p_GPIORegs->GAFR2_U & ~(XLLP_GPIO_AF_BIT_L_DD16_MASK | XLLP_GPIO_AF_BIT_L_DD17_MASK))  | (XLLP_GPIO_AF_BIT_L_DD16 | XLLP_GPIO_AF_BIT_L_DD17); 
		XllpUnlock(LockID);
	}
		
	if (pXllpLCD->DisplayType == LS022Q8DD06)
	{
		LockID = XllpLock(GAFR2_U);
		#if defined XLLP_GPIO_AF_BIT_SSPRXD3_MASK && XLLP_GPIO_AF_BIT_SSPRXD3
			p_GPIORegs->GAFR2_U = (p_GPIORegs->GAFR2_U & ~XLLP_GPIO_AF_BIT_SSPRXD3_MASK)  | XLLP_GPIO_AF_BIT_SSPRXD3; 
		#endif
		XllpUnlock(LockID);
	}

	

	if (pXllpLCD->DisplayType != LS022Q8DD06)
	{
		LockID = XllpLock(GPSR0);
		// Turn on the backlight...
		p_GPIORegs->GPSR0 |= XLLP_GPIO_BIT_PWM_OUT0;
		XllpUnlock(LockID);
	}

	if (pXllpLCD->DisplayType == LS022Q8DD06)
	{
		p_GPIORegs->GPSR2 &= ~XLLP_GPIO_BIT_L_BIAS;
		p_GPIORegs->GPCR2 |= XLLP_GPIO_BIT_L_BIAS;
	}

}

void LCDEnableController(P_XLLP_LCD_T pXllpLCD)
{
	volatile LCDRegs *p_LCDRegs;

	p_LCDRegs = (LCDRegs *) pXllpLCD->LCDC;

	p_LCDRegs->LCCR0 |= LCD_ENB;
}


XLLP_STATUS_T XllpLCD_Overlay2_Enable(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay)
{
	XLLP_STATUS_T status = 0;
	
	volatile LCDRegs *p_LCDRegs;

	p_LCDRegs = (LCDRegs *) pXllpLCD->LCDC;	

	// Set the physical address of the frame descriptor
	pXllpLCD->frameDescriptorCh2_YCbCr_Y->FDADR =  LCD_FDADR(pXllpLCD->_DMA_CHANNEL_2_Y_FRAME_DESCRIPTOR_BASE_PHYSICAL);
	pXllpLCD->frameDescriptorCh3_YCbCr_Cb->FDADR = LCD_FDADR(pXllpLCD->_DMA_CHANNEL_3_Cb_FRAME_DESCRIPTOR_BASE_PHYSICAL);
	pXllpLCD->frameDescriptorCh4_YCbCr_Cr->FDADR = LCD_FDADR(pXllpLCD->_DMA_CHANNEL_4_Cr_FRAME_DESCRIPTOR_BASE_PHYSICAL);

	// Set the physical address of the frame buffer
	pXllpLCD->frameDescriptorCh2_YCbCr_Y->FSADR =  LCD_FSADR(pXllpLCD->_OVERLAY2_Y_CHANNEL_BASE_PHYSICAL);
	pXllpLCD->frameDescriptorCh3_YCbCr_Cb->FSADR = LCD_FSADR(pXllpLCD->_OVERLAY2_Cb_CHANNEL_BASE_PHYSICAL);
	pXllpLCD->frameDescriptorCh4_YCbCr_Cr->FSADR = LCD_FSADR(pXllpLCD->_OVERLAY2_Cr_CHANNEL_BASE_PHYSICAL);
	
	// Clear the frame ID
	pXllpLCD->frameDescriptorCh2_YCbCr_Y->FIDR  = LCD_FIDR(0);
	pXllpLCD->frameDescriptorCh3_YCbCr_Cb->FIDR  = LCD_FIDR(0);
	pXllpLCD->frameDescriptorCh4_YCbCr_Cr->FIDR  = LCD_FIDR(0);

	// Set the DMA transfer size (calculated already by XllpLCD_DMALength())
	pXllpLCD->frameDescriptorCh2_YCbCr_Y->LDCMD = LCD_Len(pXllpOverlay->ch2_size);
	pXllpLCD->frameDescriptorCh3_YCbCr_Cb->LDCMD = LCD_Len(pXllpOverlay->ch3_size);
	pXllpLCD->frameDescriptorCh4_YCbCr_Cr->LDCMD = LCD_Len(pXllpOverlay->ch4_size);

	// Store the physical address of each frame descriptor in the frame descriptor
	pXllpLCD->frameDescriptorCh2_YCbCr_Y->PHYSADDR = pXllpLCD->frameDescriptorCh2_YCbCr_Y->FDADR;
	pXllpLCD->frameDescriptorCh3_YCbCr_Cb->PHYSADDR = pXllpLCD->frameDescriptorCh3_YCbCr_Cb->FDADR;
	pXllpLCD->frameDescriptorCh4_YCbCr_Cr->PHYSADDR = pXllpLCD->frameDescriptorCh4_YCbCr_Cr->FDADR;
	
	// FBRx is cleared and is not used.
	p_LCDRegs->FBR2 = 0;
	p_LCDRegs->FBR3 = 0;
	p_LCDRegs->FBR4 = 0;

	// Load the contents of FDADRx with the physical address of this frame descriptor
	p_LCDRegs->FDADR2 = LCD_FDADR(pXllpLCD->frameDescriptorCh2_YCbCr_Y->FDADR);
	p_LCDRegs->FDADR3 = LCD_FDADR(pXllpLCD->frameDescriptorCh3_YCbCr_Cb->FDADR);
	p_LCDRegs->FDADR4 = LCD_FDADR(pXllpLCD->frameDescriptorCh4_YCbCr_Cr->FDADR);
	

	// Reinit the LCD controller so that the pixel data format can be updated for use with overlays
	XllpLCDSuspend(pXllpLCD, Suspend_Graceful);

	pXllpOverlay->TmpBPP = pXllpLCD->BPP;
	if (pXllpOverlay->DegradeBaseFrame)
	{
		pXllpLCD->BPP = BPP_1;
	}
	
	pXllpLCD->PixelDataFormat = PDFOR_11;

	// Configure the overlay registers and enable the overlay
	p_LCDRegs->OVL2C2 = (LCD_FOR(pXllpOverlay->Format) | LCD_O2YPOS(pXllpOverlay->Y_Position) | LCD_O2XPOS(pXllpOverlay->X_Position));
	p_LCDRegs->OVL2C1 = (LCD_O2EN | LCD_BPP2(pXllpOverlay->OverlayBPP) | LCD_LPO2(pXllpOverlay->OverlayHeight-1) | LCD_PPL2(pXllpOverlay->OverlayWidth-1));

	XllpLCDResume(pXllpLCD);

	return status;
}

void XllpLCD_Overlay2_Disable(P_XLLP_LCD_T pXllpLCD, P_XLLP_OVERLAY_T pXllpOverlay)
{
	volatile LCDRegs *p_LCDRegs;
	
	p_LCDRegs = (LCDRegs *) pXllpLCD->LCDC;	

	// Reinit the LCD controller so that the pixel data format can be updated for use without overlays
	XllpLCDSuspend(pXllpLCD, Suspend_Graceful);

	pXllpLCD->PixelDataFormat = PDFOR_00;

	// Undo the degraded base frame - always.
	pXllpLCD->BPP = pXllpOverlay->TmpBPP;

	p_LCDRegs->OVL2C1 &= 0x00FFFFFF; // Clear the enable bit, and clear the reserved bits 30:24.
	XllpLCDResume(pXllpLCD);
}

void XllpLCD_DMALength(P_XLLP_OVERLAY_T pXllpOverlay)
{
	unsigned int pixels = pXllpOverlay->OverlayHeight * pXllpOverlay->OverlayWidth;
	unsigned int DMALength = 0;

	// Determine the DMA transfer length
	// each DMA transfer length for YUV formatted data must be multiples of 32-bits and adjusted accordingly
	if (pXllpOverlay->Format == FORMAT_RGB)
	{
		switch(pXllpOverlay->OverlayBPP)
		{
			case O_BPP_4:
				DMALength = pixels >> 1;
				break;
			case O_BPP_8:
				DMALength = pixels;
				break;
			case O_BPP_16:
				DMALength = pixels << 1;
				break;
			case O_BPP_18:
				DMALength = pixels << 2;
				break;
			case O_BPP_18_PACKED:
				break;
			case O_BPP_19:
				DMALength = pixels << 2;
				break;
			case O_BPP_19_PACKED:
				break;
			case O_BPP_24:
				DMALength = pixels << 2;
				break;
			case O_BPP_25:
				DMALength = pixels << 2;
				break;
		default:
			break;
		}
		pXllpOverlay->ch2_size = DMALength;
		pXllpOverlay->ch3_size = 0;
		pXllpOverlay->ch4_size = 0;
	}
	if (pXllpOverlay->Format == FORMAT_PACKED_444)
	{
		pXllpOverlay->ch2_size = (pixels << 2);
		pXllpOverlay->ch3_size = 0;
		pXllpOverlay->ch4_size = 0;
	} 
	else if (pXllpOverlay->Format == FORMAT_PLANAR_444) 
	{
		// calculate the number of bits in the frame (pixels << 3)
		// mod by 32 to determine the remainder
		// subtract from 32 to determine how many bits to add to the length to make it a multiple of 32 bits
		// add this value to the number of bits in the frame
		// convert this value back to bytes
		DMALength = pixels;
		if ((DMALength % 4) > 0)
		{
			DMALength = (((32 - ((pixels << 3) % 32)) + (pixels << 3)) >> 3);  // 24 bits total
		}
		pXllpOverlay->ch2_size = DMALength;
		pXllpOverlay->ch3_size = DMALength;
		pXllpOverlay->ch4_size = DMALength;
	}
	else if (pXllpOverlay->Format == FORMAT_PLANAR_422)
	{																			
		DMALength = pixels;
		if ((DMALength % 4) > 0)
		{
			DMALength = (((32 - ((pixels << 3) % 32)) + (pixels << 3)) >> 3);	// 16 bits total
		}
		pXllpOverlay->ch2_size = DMALength;

		DMALength = pixels >> 1;
		if (((pixels << 2) % 32) > 0)
		{
			DMALength = (((32 - ((pixels << 2) % 32)) + (pixels << 2)) >> 3);
		}
		pXllpOverlay->ch3_size = DMALength;
		pXllpOverlay->ch4_size = DMALength;
	}
	else if (pXllpOverlay->Format == FORMAT_PLANAR_420)
	{
		DMALength = pixels;
		if ((DMALength % 4) > 0)
		{
			DMALength = (((32 - ((pixels << 3) % 32)) + (pixels << 3)) >> 3);	// 12 bits total
		}
		pXllpOverlay->ch2_size = DMALength;

		DMALength = pixels >> 2;
		if (((pixels << 1) % 32) > 0)
		{
			DMALength = (((32 - ((pixels << 1) % 32)) + (pixels << 1)) >> 3);
		}
		pXllpOverlay->ch3_size = DMALength;
		pXllpOverlay->ch4_size = DMALength;
	}

}