xllp_gpio.h

Lido PXA270平台开发板的最新BSP,包括源代码

/* Pin  83  alternate functions */
#define XLLP_GPIO_AF_BIT_BB_IB_CLK          (0x2u  << 6)
#define XLLP_GPIO_AF_BIT_BB_IB_CLK_MASK     (0x3u  << 6)

/* Pin  84  alternate functions */
#define XLLP_GPIO_AF_BIT_BB_IB_STB          (0x2u  << 8)
#define XLLP_GPIO_AF_BIT_BB_IB_STB_MASK     (0x3u  << 8)

/* Pin  85  alternate functions */
#define XLLP_GPIO_AF_BIT_PCMCIA_nPCE1       (XLLP_BIT_10)
#define XLLP_GPIO_AF_BIT_PCMCIA_nPCE1_MASK  (0x3u  << 10)
#define XLLP_GPIO_AF_BIT_BB_IB_WAIT         (0x2u  << 10)
#define XLLP_GPIO_AF_BIT_BB_IB_WAIT_MASK    (0x3u  << 10)

/* Pin  86  alternate functions */
#define XLLP_GPIO_AF_BIT_L_DD16             (0x2u  << 12)
#define XLLP_GPIO_AF_BIT_L_DD16_MASK        (0x3u  << 12)

/* Pin  87  alternate functions */
#define XLLP_GPIO_AF_BIT_L_DD17             (0x2u  << 14)
#define XLLP_GPIO_AF_BIT_L_DD17_MASK        (0x3u  << 14)

/* Pin  88  alternate functions */
#define XLLP_GPIO_AF_BIT_USBHPWR0           (XLLP_BIT_16)
#define XLLP_GPIO_AF_BIT_USBHPWR0_MASK      (0x3u  << 16)

/* Pin  89  alternate functions */
#define XLLP_GPIO_AF_BIT_USBHPEN0           (0x2u  << 18)
#define XLLP_GPIO_AF_BIT_USBHPEN0_MASK      (0x3u  << 18)

/* Pin  90  alternate functions */
#define XLLP_GPIO_AF_BIT_URST               (0x2u  << 20)
#define XLLP_GPIO_AF_BIT_URST_MASK          (0x3u  << 20)

/* Pin  91  alternate functions */
#define XLLP_GPIO_AF_BIT_UCLK               (0x2u  << 22)
#define XLLP_GPIO_AF_BIT_UCLK_MASK          (0x3u  << 22)

/* Pin  92  alternate functions */
#define XLLP_GPIO_AF_BIT_MMDAT0             (XLLP_BIT_24)
#define XLLP_GPIO_AF_BIT_MMDAT0_MASK        (0x3u  << 24)
#define XLLP_GPIO_AF_BIT_MSBS               (0x2u  << 24)
#define XLLP_GPIO_AF_BIT_MSBS_MASK          (0x3u  << 24)

/* Pin  93  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_DKIN0           (XLLP_BIT_26)
#define XLLP_GPIO_AF_BIT_KP_DKIN0_MASK      (0x3u  << 26)

/* Pin  94  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_DKIN1           (XLLP_BIT_28)
#define XLLP_GPIO_AF_BIT_KP_DKIN1_MASK      (0x3u  << 28)

/* Pin  95  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_DKIN2           (0x3u  << 30)
#define XLLP_GPIO_AF_BIT_KP_DKIN2_MASK      (0x3u  << 30)

/* Pin  96  alternate functions */
#define XLLP_GPIO_AF_BIT_DVAL1              (0x2u  << 0)
#define XLLP_GPIO_AF_BIT_DVAL1_MASK         (0x3u  << 0)

/* Pin  96  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT6          (0x3u  << 0)
#define XLLP_GPIO_AF_BIT_KP_MKOUT6_MASK     (0x3u  << 0)

/* Pin  97  alternate functions */
#define XLLP_GPIO_AF_BIT_DREQ1              (0x2u  << 2)
#define XLLP_GPIO_AF_BIT_DREQ1_MASK         (0x3u  << 2)

/* Pin  97  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKIN3           (0x3u  << 2)
#define XLLP_GPIO_AF_BIT_KP_MKIN3_MASK      (0x3u  << 2)

/* Pin  98  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_DKIN5           (0x3u  << 4)
#define XLLP_GPIO_AF_BIT_KP_DKIN5_MASK      (0x3u  << 4)

/* Pin  99  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_DKIN6           (0x3u  << 6)
#define XLLP_GPIO_AF_BIT_KP_DKIN6_MASK      (0x3u  << 6)

/* Pin  100  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKIN0           (XLLP_BIT_8)
#define XLLP_GPIO_AF_BIT_KP_MKIN0_MASK      (0x3u  << 8)

/* Pin  101  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKIN1           (XLLP_BIT_10)
#define XLLP_GPIO_AF_BIT_KP_MKIN1_MASK      (0x3u  << 10)

/* Pin  102  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKIN2           (XLLP_BIT_12)
#define XLLP_GPIO_AF_BIT_KP_MKIN2_MASK      (0x3u  << 12)

/* Pin  103  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT0          (0x2u  << 14)
#define XLLP_GPIO_AF_BIT_KP_MKOUT0_MASK     (0x3u  << 14)

/* Pin  104  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT1          (0x2u  << 16)
#define XLLP_GPIO_AF_BIT_KP_MKOUT1_MASK     (0x3u  << 16)

/* Pin  105  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT2          (0x2u  << 18)
#define XLLP_GPIO_AF_BIT_KP_MKOUT2_MASK     (0x3u  << 18)

/* Pin  106  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT3          (0x2u  << 20)
#define XLLP_GPIO_AF_BIT_KP_MKOUT3_MASK     (0x3u  << 20)

/* Pin  107  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT4          (0x2u  << 22)
#define XLLP_GPIO_AF_BIT_KP_MKOUT4_MASK     (0x3u  << 22)

/* Pin  108  alternate functions */
#define XLLP_GPIO_AF_BIT_KP_MKOUT5          (0x2u  << 24)
#define XLLP_GPIO_AF_BIT_KP_MKOUT_MASK      (0x3u  << 24)

/* Pin  109  alternate functions */
#define XLLP_GPIO_AF_BIT_MSSDIO             (0x2u  << 26)
#define XLLP_GPIO_AF_BIT_MSSDIO_MASK        (0x3u  << 26)
#define XLLP_GPIO_AF_BIT_MMDAT1             (XLLP_BIT_26)
#define XLLP_GPIO_AF_BIT_MMDAT1_MASK        (0x3u  << 26)

/* Pin  110  alternate functions */
#define XLLP_GPIO_AF_BIT_MMDAT2             (XLLP_BIT_28)
#define XLLP_GPIO_AF_BIT_MMDAT2_MASK        (0x3u  << 28)

/* Pin  111  alternate functions */
#define XLLP_GPIO_AF_BIT_MMDAT3             (XLLP_BIT_30)
#define XLLP_GPIO_AF_BIT_MMDAT3_MASK        (0x3u  << 30)

/* Pin  112  alternate functions */
#define XLLP_GPIO_AF_BIT_MMCMD              (XLLP_BIT_0)
#define XLLP_GPIO_AF_BIT_MMCMD_MASK         (0x3u  << 0)
#define XLLP_GPIO_AF_BIT_MSINS              (0x2u  << 0)
#define XLLP_GPIO_AF_BIT_MSINS_MASK         (0x3u  << 0)

/* Pin  113  alternate functions */
#define XLLP_GPIO_AF_BIT_AC97_nRESET        (0x2u  << 2)
#define XLLP_GPIO_AF_BIT_AC97_nRESET_MASK   (0x3u  << 2)

/* Pin  114  alternate functions */
#define XLLP_GPIO_AF_BIT_UVS0               (0x2u  << 4)
#define XLLP_GPIO_AF_BIT_UVS0_MASK          (0x3u  << 4)

/* Pin  115  alternate functions */
#define XLLP_GPIO_AF_BIT_UVS1               (0x2u  << 6)
#define XLLP_GPIO_AF_BIT_UVS1_MASK          (0x3u  << 6)

/* Pin  116  alternate functions */
#define XLLP_GPIO_AF_BIT_UVS2               (0x2u  << 8)
#define XLLP_GPIO_AF_BIT_UVS2_MASK          (0x3u  << 8)

/* Pin  117  alternate functions */
#define XLLP_GPIO_AF_BIT_SCL                (XLLP_BIT_10)
#define XLLP_GPIO_AF_BIT_SCL_MASK           (0x3u  << 10)

/* Pin  118  alternate functions */
#define XLLP_GPIO_AF_BIT_SDA                (XLLP_BIT_12)
#define XLLP_GPIO_AF_BIT_SDA_MASK           (0x3u  << 12)


/* END of alternate function values for each GPIO  -- in BIT-WISE */
/*=================================================================*/

/* GPIO Register Fields */

#define XLLP_GPIO_PIN_RESERVED_BITS  0xfe000000u
#define XLLP_GPIO_ALT_RESERVED_BITS  0xfffc0000u
#define XLLP_GPIO_ALT_FUNC_MASK      3u

/************************************************************************/
/* BEGIN of alternate function values for each GPIO*/
//
//      ~~~ALTERNATE FUNCTIONS~~~
//    

/* Pin  11  alternate functions */
#define XLLP_GPIO_AF_CLK48M              XLLP_GPIO_ALT_FN_3

/* Pin  14  alternate functions */
#define XLLP_GPIO_AF_L_VSYNC             XLLP_GPIO_ALT_FN_1

/* Pin  15  alternate functions */
#define XLLP_GPIO_AF_nCS1                XLLP_GPIO_ALT_FN_2

/* Pin  16  alternate functions */
#define XLLP_GPIO_AF_PWM_OUT0            XLLP_GPIO_ALT_FN_2

/* Pin  17  alternate functions */
#define XLLP_GPIO_AF_PWM_OUT1            XLLP_GPIO_ALT_FN_2

/* Pin  18  alternate functions */
#define XLLP_GPIO_AF_RDY                 XLLP_GPIO_ALT_FN_1

/* Pin  19  alternate functions */
#define XLLP_GPIO_AF_L_CS                XLLP_GPIO_ALT_FN_2

/* Pin  20  alternate functions */
#define XLLP_GPIO_AF_MBREQ               XLLP_GPIO_ALT_FN_2

/* Pin  21  alternate functions */
#define XLLP_GPIO_AF_MBGNT               XLLP_GPIO_ALT_FN_3

/* Pin  23  alternate functions */
#define XLLP_GPIO_AF_SSPSCLK             XLLP_GPIO_ALT_FN_2

/* Pin  24  alternate functions */
#define XLLP_GPIO_AF_SSPSFRM             XLLP_GPIO_ALT_FN_3

/* Pin  25  alternate functions */
#define XLLP_GPIO_AF_SSPTXD              XLLP_GPIO_ALT_FN_2

/* Pin  26  alternate functions */
#define XLLP_GPIO_AF_SSPRXD              XLLP_GPIO_ALT_FN_1

/* Pin  27  alternate functions */
#define XLLP_GPIO_AF_SSPEXTCLK           XLLP_GPIO_ALT_FN_1

/* Pin  28  alternate functions */
#define XLLP_GPIO_AF_AC97_BITCLK         XLLP_GPIO_ALT_FN_1

/* Pin  29  alternate functions */
#define XLLP_GPIO_AF_AC97_SDATA_IN_0     XLLP_GPIO_ALT_FN_1

/* Pin  30  alternate functions */
#define XLLP_GPIO_AF_AC97_SDATA_OUT      XLLP_GPIO_ALT_FN_2

/* Pin  31  alternate functions */
#define XLLP_GPIO_AF_AC97_SYNC           XLLP_GPIO_ALT_FN_2

/* Pin  32  alternate functions */
#define XLLP_GPIO_AF_MSSCLK              XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_MMCLK               XLLP_GPIO_ALT_FN_2

/* Pin  33  alternate functions */
#define XLLP_GPIO_AF_nCS5                XLLP_GPIO_ALT_FN_2

/* Pin  34  alternate functions */
#define XLLP_GPIO_AF_FFRXD               XLLP_GPIO_ALT_FN_1

/* Pin  35  alternate functions */
#define XLLP_GPIO_AF_FFCTS               XLLP_GPIO_ALT_FN_1

/* Pin  36  alternate functions */
#define XLLP_GPIO_AF_FFDCD               XLLP_GPIO_ALT_FN_1

/* Pin  37  alternate functions */
#define XLLP_GPIO_AF_FFDSR               XLLP_GPIO_ALT_FN_1

/* Pin  38  alternate functions */
#define XLLP_GPIO_AF_FFRI                XLLP_GPIO_ALT_FN_1

/* Pin  39  alternate functions */
#define XLLP_GPIO_AF_FFTXD               XLLP_GPIO_ALT_FN_2

/* Pin  40  alternate functions */
#define XLLP_GPIO_AF_FFDTR               XLLP_GPIO_ALT_FN_2

/* Pin  41  alternate functions */
#define XLLP_GPIO_AF_FFRTS               XLLP_GPIO_ALT_FN_2

/* Pin  42  alternate functions */
#define XLLP_GPIO_AF_BTRXD               XLLP_GPIO_ALT_FN_1

/* Pin  43  alternate functions */
#define XLLP_GPIO_AF_BTTXD               XLLP_GPIO_ALT_FN_2

/* Pin  44  alternate functions */
#define XLLP_GPIO_AF_BTCTS               XLLP_GPIO_ALT_FN_1

/* Pin  45  alternate functions */
#define XLLP_GPIO_AF_BTRTS               XLLP_GPIO_ALT_FN_2

/* Pin  46  alternate functions */
#define XLLP_GPIO_AF_ICP_RXD             XLLP_GPIO_ALT_FN_1

/* Pin  47  alternate functions */
#define XLLP_GPIO_AF_ICP_TXD             XLLP_GPIO_ALT_FN_2

/* Pin  48  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT1          XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPOE         XLLP_GPIO_ALT_FN_2

/* Pin  49  alternate functions */
#define XLLP_GPIO_AF_nPWE                XLLP_GPIO_ALT_FN_2

/* Pin  50  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT2          XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPIOR        XLLP_GPIO_ALT_FN_2

/* Pin  51  alternate functions */
#define XLLP_GPIO_AF_BB_OB_DAT3          XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_PCMCIA_nPIOW        XLLP_GPIO_ALT_FN_2

/* Pin  52  alternate functions */
#define XLLP_GPIO_AF_BB_OB_CLK           XLLP_GPIO_ALT_FN_1

/* Pin  53  alternate functions */
#define XLLP_GPIO_AF_BB_OB_STB           XLLP_GPIO_ALT_FN_1

/* Pin  54  alternate functions */
#define XLLP_GPIO_AF_BB_OB_WAIT          XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_PCMCIA_nPCE2        XLLP_GPIO_ALT_FN_2

/* Pin  55  alternate functions */
#define XLLP_GPIO_AF_BB_IB_DAT1          XLLP_GPIO_ALT_FN_2
#define XLLP_GPIO_AF_PCMCIA_nPREG        XLLP_GPIO_ALT_FN_2

/* Pin  56  alternate functions */
#define XLLP_GPIO_AF_PCMCIA_nPWAIT       XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_BB_IB_DAT2          XLLP_GPIO_ALT_FN_2

/* Pin  57  alternate functions */
#define XLLP_GPIO_AF_PCMCIA_nIOIS16      XLLP_GPIO_ALT_FN_1
#define XLLP_GPIO_AF_BB_IB_DAT3          XLLP_GPIO_ALT_FN_2

/* Pin  58  alternate functions */
#define XLLP_GPIO_AF_L_DD0               XLLP_GPIO_ALT_FN_2

/* Pin  59  alternate functions */
#define XLLP_GPIO_AF_L_DD1               XLLP_GPIO_ALT_FN_2

/* Pin  60  alternate functions */
#define XLLP_GPIO_AF_L_DD2               XLLP_GPIO_ALT_FN_2

/* Pin  61  alternate functions */
#define XLLP_GPIO_AF_L_DD3               XLLP_GPIO_ALT_FN_2

/* Pin  62  alternate functions */
#define XLLP_GPIO_AF_L_DD4               XLLP_GPIO_ALT_FN_2

/* Pin  63  alternate functions */