xllp_cpld.h

Lido PXA270平台开发板的最新BSP,包括源代码

/******************************************************************************
**
** INTEL CONFIDENTIAL
** Copyright 2000-2003 Intel Corporation All Rights Reserved.
**
** The source code contained or described herein and all documents
** related to the source code (Material) are owned by Intel Corporation
** or its suppliers or licensors.  Title to the Material remains with
** Intel Corporation or its suppliers and licensors. The Material contains
** trade secrets and proprietary and confidential information of Intel
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** Material may be used, copied, reproduced, modified, published, uploaded,
** posted, transmitted, distributed, or disclosed in any way without Intel抯
** prior express written permission.
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** property right is granted to or conferred upon you by disclosure or
** delivery of the Materials, either expressly, by implication, inducement,
** estoppel or otherwise. Any license under such intellectual property rights
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**
**  FILENAME:       xllp_cpld.h
**
**  PURPOSE: Contains all Board Control Register (aka Board Level Register)
**              specific macros, typedefs, and prototypes.
**           Includes System Configuration Register (not memory mapped) constant 
**              definitions  
**           Declares no storage.
**                  
**
******************************************************************************/

#ifndef __XLLP_CPLD_H__
#define __XLLP_CPLD_H__

#include "xllp_defs.h"

/**
  CPLD Register Definitions
**/

typedef struct
{
    XLLP_VUINT32_T BCR1;                /* 0x00 */
    XLLP_VUINT32_T BCR2;                /* 0x04 */
    XLLP_VUINT32_T STATUS;              /* 0x08 */
    XLLP_VUINT32_T SWITCH;              /* 0x0C */
    XLLP_VUINT32_T INT;                 /* 0x10 */
} XLLP_CPLD_T, *P_XLLP_CPLD_T;


#define XLLP_BCR_CF_POWER  	0x00000001
#define XLLP_BCR_CF_RESET  	0x00000002
#define XLLP_BCR_IRDA_FSEL 	0x00000004
#define XLLP_BCR_IRDA_MD0  	0x00000008
#define XLLP_BCR_IRDA_MD1  	0x00000010
#define XLLP_BCR_CF_BUS    	0x00000020
#define XLLP_BCR_AUDIO     	0x00000040
#define XLLP_BCR_LCD_PWR 	0x00000100
#define XLLP_BCR_RED_LED 	0x00001000
#define XLLP_BCR_GREEN_LED 	0x00002000
#define XLLP_BCR_SPRK    	0x00004000
#define XLLP_BCR_MMC_PWR   	0x00008000

#define XLLP_BCR2_MS_PWR  	0x00000001
#define XLLP_BCR2_VBUS_ON  	0x00000002
#define XLLP_BCR2_I2C_EN  	0x00000004
#define XLLP_BCR2_DAC_ON  	0x00000008
#define XLLP_BCR2_MBREQ_EN 	0x00000010
#define XLLP_BCR2_FLY_EN  	0x00000020

#define XLLP_STS_CF_DET    	0x00000001
#define XLLP_STS_BVD1      	0x00000002
#define XLLP_STS_BVD2      	0x00000004
#define XLLP_STS_MMC_DET   	0x00000008
#define XLLP_STS_MMC_WP    	0x00000010
#define XLLP_STS_SIM_DET   	0x00000020
#define XLLP_STS_MS_DET    	0x00000040
#define XLLP_STS_POLL_FLAG 	0x00000080
#define XLLP_STS_USB1_WAKE 	0x00000100
#define XLLP_STS_DIP_FLASH 	0x00000200
#define XLLP_STS_EX_PRES   	0x00000400
#define XLLP_STS_EX_IN0    	0x00000800
#define XLLP_STS_EX_IN1    	0x00001000

#define XLLP_INT_MMC_IN 	0x00000001
#define XLLP_INT_MMC_OUT 	0x00000002
#define XLLP_INT_SIM_IN 	0x00000004
#define XLLP_INT_SIM_OUT 	0x00000008
#define XLLP_INT_USB_IN 	0x00000010
#define XLLP_INT_USB_OUT 	0x00000020
#define XLLP_INT_CF_IN 		0x00000040
#define XLLP_INT_CF_OUT 	0x00000080
#define XLLP_INT_SW1 		0x00000100
#define XLLP_INT_SW2	 	0x00000200
#define XLLP_INT_SW3	 	0x00000400
#define XLLP_INT_SW4_1	 	0x00000800
#define XLLP_INT_SW4_2	 	0x00001000
#define XLLP_INT_SW4_3		0x00002000

void XllpCPLDWriteBCR(P_XLLP_CPLD_T, XLLP_UINT32_T, XLLP_UINT32_T);

#endif //__XLLP_CPLD_H__