📄 stm32f10x_adc.c
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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_adc.c
* Author : MCD Application Team
* Version : V2.0.2
* Date : 07/11/2008
* Description : This file provides all the ADC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_adc.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ADC DISCNUM mask */
#define CR1_DISCNUM_Reset ((u32)0xFFFF1FFF)
/* ADC DISCEN mask */
#define CR1_DISCEN_Set ((u32)0x00000800)
#define CR1_DISCEN_Reset ((u32)0xFFFFF7FF)
/* ADC JAUTO mask */
#define CR1_JAUTO_Set ((u32)0x00000400)
#define CR1_JAUTO_Reset ((u32)0xFFFFFBFF)
/* ADC JDISCEN mask */
#define CR1_JDISCEN_Set ((u32)0x00001000)
#define CR1_JDISCEN_Reset ((u32)0xFFFFEFFF)
/* ADC AWDCH mask */
#define CR1_AWDCH_Reset ((u32)0xFFFFFFE0)
/* ADC Analog watchdog enable mode mask */
#define CR1_AWDMode_Reset ((u32)0xFF3FFDFF)
/* CR1 register Mask */
#define CR1_CLEAR_Mask ((u32)0xFFF0FEFF)
/* ADC ADON mask */
#define CR2_ADON_Set ((u32)0x00000001)
#define CR2_ADON_Reset ((u32)0xFFFFFFFE)
/* ADC DMA mask */
#define CR2_DMA_Set ((u32)0x00000100)
#define CR2_DMA_Reset ((u32)0xFFFFFEFF)
/* ADC RSTCAL mask */
#define CR2_RSTCAL_Set ((u32)0x00000008)
/* ADC CAL mask */
#define CR2_CAL_Set ((u32)0x00000004)
/* ADC SWSTART mask */
#define CR2_SWSTART_Set ((u32)0x00400000)
/* ADC EXTTRIG mask */
#define CR2_EXTTRIG_Set ((u32)0x00100000)
#define CR2_EXTTRIG_Reset ((u32)0xFFEFFFFF)
/* ADC Software start mask */
#define CR2_EXTTRIG_SWSTART_Set ((u32)0x00500000)
#define CR2_EXTTRIG_SWSTART_Reset ((u32)0xFFAFFFFF)
/* ADC JEXTSEL mask */
#define CR2_JEXTSEL_Reset ((u32)0xFFFF8FFF)
/* ADC JEXTTRIG mask */
#define CR2_JEXTTRIG_Set ((u32)0x00008000)
#define CR2_JEXTTRIG_Reset ((u32)0xFFFF7FFF)
/* ADC JSWSTART mask */
#define CR2_JSWSTART_Set ((u32)0x00200000)
/* ADC injected software start mask */
#define CR2_JEXTTRIG_JSWSTART_Set ((u32)0x00208000)
#define CR2_JEXTTRIG_JSWSTART_Reset ((u32)0xFFDF7FFF)
/* ADC TSPD mask */
#define CR2_TSVREFE_Set ((u32)0x00800000)
#define CR2_TSVREFE_Reset ((u32)0xFF7FFFFF)
/* CR2 register Mask */
#define CR2_CLEAR_Mask ((u32)0xFFF1F7FD)
/* ADC SQx mask */
#define SQR3_SQ_Set ((u32)0x0000001F)
#define SQR2_SQ_Set ((u32)0x0000001F)
#define SQR1_SQ_Set ((u32)0x0000001F)
/* SQR1 register Mask */
#define SQR1_CLEAR_Mask ((u32)0xFF0FFFFF)
/* ADC JSQx mask */
#define JSQR_JSQ_Set ((u32)0x0000001F)
/* ADC JL mask */
#define JSQR_JL_Set ((u32)0x00300000)
#define JSQR_JL_Reset ((u32)0xFFCFFFFF)
/* ADC SMPx mask */
#define SMPR1_SMP_Set ((u32)0x00000007)
#define SMPR2_SMP_Set ((u32)0x00000007)
/* ADC JDRx registers offset */
#define JDR_Offset ((u8)0x28)
/* ADC1 DR register base address */
#define DR_ADDRESS ((u32)0x4001244C)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : ADC_DeInit
* Description : Deinitializes the ADCx peripheral registers to their default
* reset values.
* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
* Output : None
* Return : None
*******************************************************************************/
void ADC_DeInit(ADC_TypeDef* ADCx)
{
/* Check the parameters */
assert_param(IS_ADC_ALL_PERIPH(ADCx));
switch (*(u32*)&ADCx)
{
case ADC1_BASE:
/* Enable ADC1 reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
/* Release ADC1 from reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
break;
case ADC2_BASE:
/* Enable ADC2 reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
/* Release ADC2 from reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
break;
case ADC3_BASE:
/* Enable ADC3 reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
/* Release ADC3 from reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : ADC_Init
* Description : Initializes the ADCx peripheral according to the specified parameters
* in the ADC_InitStruct.
* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
* - ADC_InitStruct: pointer to an ADC_InitTypeDef structure that
* contains the configuration information for the specified
* ADC peripheral.
* Output : None
* Return : None
******************************************************************************/
void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
{
u32 tmpreg1 = 0;
u8 tmpreg2 = 0;
/* Check the parameters */
assert_param(IS_ADC_ALL_PERIPH(ADCx));
assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
/*---------------------------- ADCx CR1 Configuration -----------------*/
/* Get the ADCx CR1 value */
tmpreg1 = ADCx->CR1;
/* Clear DUALMOD and SCAN bits */
tmpreg1 &= CR1_CLEAR_Mask;
/* Configure ADCx: Dual mode and scan conversion mode */
/* Set DUALMOD bits according to ADC_Mode value */
/* Set SCAN bit according to ADC_ScanConvMode value */
tmpreg1 |= (u32)(ADC_InitStruct->ADC_Mode | ((u32)ADC_InitStruct->ADC_ScanConvMode << 8));
/* Write to ADCx CR1 */
ADCx->CR1 = tmpreg1;
/*---------------------------- ADCx CR2 Configuration -----------------*/
/* Get the ADCx CR2 value */
tmpreg1 = ADCx->CR2;
/* Clear CONT, ALIGN and EXTSEL bits */
tmpreg1 &= CR2_CLEAR_Mask;
/* Configure ADCx: external trigger event and continuous conversion mode */
/* Set ALIGN bit according to ADC_DataAlign value */
/* Set EXTSEL bits according to ADC_ExternalTrigConv value */
/* Set CONT bit according to ADC_ContinuousConvMode value */
tmpreg1 |= (u32)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
((u32)ADC_InitStruct->ADC_ContinuousConvMode << 1));
/* Write to ADCx CR2 */
ADCx->CR2 = tmpreg1;
/*---------------------------- ADCx SQR1 Configuration -----------------*/
/* Get the ADCx SQR1 value */
tmpreg1 = ADCx->SQR1;
/* Clear L bits */
tmpreg1 &= SQR1_CLEAR_Mask;
/* Configure ADCx: regular channel sequence length */
/* Set L bits according to ADC_NbrOfChannel value */
tmpreg2 |= (ADC_InitStruct->ADC_NbrOfChannel - 1);
tmpreg1 |= ((u32)tmpreg2 << 20);
/* Write to ADCx SQR1 */
ADCx->SQR1 = tmpreg1;
}
/*******************************************************************************
* Function Name : ADC_StructInit
* Description : Fills each ADC_InitStruct member with its default value.
* Input : ADC_InitStruct : pointer to an ADC_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
{
/* Reset ADC init structure parameters values */
/* Initialize the ADC_Mode member */
ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
/* initialize the ADC_ScanConvMode member */
ADC_InitStruct->ADC_ScanConvMode = DISABLE;
/* Initialize the ADC_ContinuousConvMode member */
ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
/* Initialize the ADC_ExternalTrigConv member */
ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
/* Initialize the ADC_DataAlign member */
ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
/* Initialize the ADC_NbrOfChannel member */
ADC_InitStruct->ADC_NbrOfChannel = 1;
}
/*******************************************************************************
* Function Name : ADC_Cmd
* Description : Enables or disables the specified ADC peripheral.
* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
* - NewState: new state of the ADCx peripheral. This parameter
* can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_ADC_ALL_PERIPH(ADCx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Set the ADON bit to wake up the ADC from power down mode */
ADCx->CR2 |= CR2_ADON_Set;
}
else
{
/* Disable the selected ADC peripheral */
ADCx->CR2 &= CR2_ADON_Reset;
}
}
/*******************************************************************************
* Function Name : ADC_DMACmd
* Description : Enables or disables the specified ADC DMA request.
* Input : - ADCx: where x can be 1 or 3 to select the ADC peripheral.
* Note: ADC2 hasn't a DMA capability.
* - NewState: new state of the selected ADC DMA transfer.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_ADC_DMA_PERIPH(ADCx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected ADC DMA request */
ADCx->CR2 |= CR2_DMA_Set;
}
else
{
/* Disable the selected ADC DMA request */
ADCx->CR2 &= CR2_DMA_Reset;
}
}
/*******************************************************************************
* Function Name : ADC_ITConfig
* Description : Enables or disables the specified ADC interrupts.
* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
* - ADC_IT: specifies the ADC interrupt sources to be enabled
* or disabled.
* This parameter can be any combination of the following values:
* - ADC_IT_EOC: End of conversion interrupt mask
* - ADC_IT_AWD: Analog watchdog interrupt mask
* - ADC_IT_JEOC: End of injected conversion interrupt mask
* - NewState: new state of the specified ADC interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void ADC_ITConfig(ADC_TypeDef* ADCx, u16 ADC_IT, FunctionalState NewState)
{
u8 itmask = 0;
/* Check the parameters */
assert_param(IS_ADC_ALL_PERIPH(ADCx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_ADC_IT(ADC_IT));
/* Get the ADC IT index */
itmask = (u8)ADC_IT;
if (NewState != DISABLE)
{
/* Enable the selected ADC interrupts */
ADCx->CR1 |= itmask;
}
else
{
/* Disable the selected ADC interrupts */
ADCx->CR1 &= (~(u32)itmask);
}
}
/*******************************************************************************
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