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📄 wm8753.c

📁 Embest IDE下s3c2440的测试工程
💻 C
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	ret += wm8753_i2c_write(0x34, WM8753_LOUTM1, 0x0180);
	
	/* enable right mixer */
	ret += wm8753_i2c_write(0x34, WM8753_ROUTM1, 0x0180);
	
	
//set LDAC & RDAC Volume output	
	/* WM8753_LDAC	:R8 (8h) Left Channel Digital Volume
		Left Volume DAC update
	    	8	LDVU  		0			store LDACVOL in intermediate latch(no gain change)
	    					1			Update left and right channel gains(left=LDACVOL, right=intermediate latch)
	   	LDACVOL :Left DAC Digital Volume Control	
	    	7:0	LDACVOL		00000000	Digital Mute
	    	 				00000001	-127DB
	    	 				......			0.5DB steps up to
	    	 				11111111	0DB
	 */   
	wm8753_i2c_write(0x34, WM8753_LDAC, 0x01ff);
	/* WM8753_RDAC	:R8 (8h) right Channel Digital Volume
		right Volume DAC update
	    	8	RDVU  		0			store RDACVOL in intermediate latch(no gain change)
	    					1			Update left and right channel gains(right=RDACVOL, left=intermediate latch)
	   	LDACVOL :Left DAC Digital Volume Control	
	    	7:0	RDACVOL	00000000	Digital Mute
	    	 				00000001	-127DB
	    	 				......			0.5DB steps up to
	    	 				11111111	0DB
	 */   
	wm8753_i2c_write(0x34, WM8753_RDAC,0x01ff);			/*left right out1 volume */
	ret +=wm8753_i2c_write(0x34, WM8753_LOUT1V, 0x0166);//ggggggggggggggggggggggggggg160
	ret +=wm8753_i2c_write(0x34, WM8753_ROUT1V, 0x0166);//ggggggggggggggggggg160
	/* set up default output audio paths, enable right out 2 */
	ret += wm8753_i2c_write(0x34, WM8753_ROUTM2, 0x0103);
	
	/* unmute hifi DAC */
	ret += wm8753_i2c_write(0x34, WM8753_DAC, 0x0);
	
out:	
	return ret != 0 ? -1 : 0;
}
//============================
void * func_iis_test[][2]=
{	
	//IIS Function Test Item
	(void *)Play_Wave_IIS,				"Play Wave File. ",
    	(void *)RecordSound_ViaMICIn_IIS,	"Record Sound via MIC-In and Play it. ",
    	(void *)RecordSound_ViaLineIn_IIS, 	"Record Sound via Line-In and Play it. ",
    	0,0
};

void IIS_Test(void)
{
#if 0
int i;
		
	while(1)
	{
		i=0;
		Uart_Printf("\n\n================== IIS Function Test =====================\n\n");
		
		while(1)
		{   //display menu
			Uart_Printf("%2d:%s",i,func_iis_test[i][1]);
			i++;
			if((int)(func_iis_test[i][0])==0)
			{
				Uart_Printf("\n");
				break;
			}
			if((i%2)==0)
			Uart_Printf("\n");
		}
		Uart_Printf("\n==========================================================\n");
		Uart_Printf("\nPress Enter key to exit : ");
		i = Uart_GetIntNum();
		if(i==-1) break;		// return.
		if(i>=0 && (i<((sizeof(func_iis_test)-1)/8)) )	// select and execute...
			( (void (*)(void)) (func_iis_test[i][0]) )();
	}
#else
	Play_Wave_IIS();
#endif
	
}

//Play Wave File
void Play_Wave_IIS(void)
{
	int i;
	int ret = 0;
	Uart_Printf("\nPlay Wave File.\n");
	char *wavefile = "denglu.wav";
//	for(i=0; i<600*1024; i++){
//		wav[i] = (unsigned short )((rand() % 100) * i);
//	}

    	IIS_Port_Init();
    	Select_IIS_Master_CLK();

//	Download_Wave_File();
//	Open_Wave_File(wavefile);
	

//	Init1341(PLAY_IIS);
	if ((ret = wm8753_init()) != 0) {
		Uart_Printf("can't initialise WM8753 \n");
		return;
	}

//	IIS_PlayWave_DMA2(Buf+0x30, size);
	IIS_PlayWave_DMA2((unsigned char *)(0x31000000), 155760);

	IIS_Port_Return();
    
    	mute = 1;
	return;
}

//Record Sound via MIC-In
void RecordSound_ViaMICIn_IIS(void)
{
	
	int ret = 0;
	Uart_Printf("\nRecord Sound via MIC-In.\n");

    	IIS_Port_Init(); 
	Select_IIS_Master_CLK();
	
//	Init1341(RECORD_MICIn);
	if ((ret = wm8753_init()) != 0) {
		Uart_Printf("can't initialise WM8753 \n");
		return;
	}

	IIS_RecSound_DMA1(RECORD_MICIn, REC_LEN_IIS);
//	Init1341(PLAY_IIS);
	IIS_PlayWave_DMA2(rec_buf, REC_LEN_IIS);

	IIS_Port_Return();
	
	mute = 1;
}

//Record Sound via Line-In 
void RecordSound_ViaLineIn_IIS(void)
{
	
	Uart_Printf("\nRecord Sound via Line-In.\n");

    	IIS_Port_Init(); 
	Select_IIS_Master_CLK();
	
	Init1341(RECORD_LineIn);
	IIS_RecSound_DMA1(RECORD_LineIn, REC_LEN_IIS);
	Init1341(PLAY_IIS);
	IIS_PlayWave_DMA2(rec_buf, REC_LEN_IIS);

	IIS_Port_Return();
	
	mute = 1;
}


/* Sub-Routines */ 

//Setting Port related to IIS  
void IIS_Port_Init(void)
{
	save_B  = rGPBCON;	 
    	save_E  = rGPECON;	 
    	save_PB = rGPBUP;
    	save_PE = rGPEUP;
    	
	//----------------------------------------------------------
	//   PORT B GROUP
	//Ports  :   GPB4    GPB3   GPB2  
	//Signal :  L3CLOCK L3DATA L3MODE
	//Setting:   OUTPUT OUTPUT OUTPUT 
	//	     [9:8]   [7:6}  [5:4]
	//Binary :     01  ,   01    01 
	//----------------------------------------------------------    
    	rGPBUP  = rGPBUP  & ~(0x7<<2) | (0x7<<2);   //The pull up function is disabled GPB[4:2] 1 1100    
    	rGPBCON = rGPBCON & ~(0x3f<<4) | (0x15<<4); //GPB[4:2]=Output(L3CLOCK):Output(L3DATA):Output(L3MODE)

	//----------------------------------------------------------
	//   PORT E GROUP
	//Ports  :  GPE4    GPE3   GPE2  GPE1    GPE0 
	//Signal : I2SSDO  I2SSDI CDCLK I2SSCLK I2SLRCK 
	//Binary :   10  ,   10     10 ,  10	10    
	//----------------------------------------------------------
    	rGPEUP  = rGPEUP  & ~(0x1f)  | 0x1f;    //The pull up function is disabled GPE[4:0] 1 1111
    	rGPECON = rGPECON & ~(0x3ff) | 0x2aa;   //GPE[4:0]=I2SSDO:I2SSDI:CDCLK:I2SSCLK:I2SLRCK

    	rGPFUP   = ((rGPFUP   & ~(1<<0)) | (1<<0));     //GPF0
    	rGPFCON  = ((rGPFCON  & ~(3<<0)) | (1<<1));     //GPF0=EINT0    
    	rEXTINT0 = ((rEXTINT0 & ~(7<<0)) | (2<<0));     //EINT0=falling edge triggered  
}

void IIS_Port_Return(void)
{
	rGPBCON = save_B;
    	rGPECON = save_E;
    	rGPBUP  = save_PB;
    	rGPEUP  = save_PE;
}

void Download_Wave_File(void)
{
	unsigned int temp;
	
    	pISR_UART1 = (unsigned)RxInt;

    	rINTMSK    = ~(BIT_UART1);
    	rINTSUBMSK = ~(BIT_SUB_RXD1);

    	//Non-cacheable area = 0x31000000 ~ 0x33feffff
    	Buf   = (unsigned char *)0x31000000;
    	_temp = Buf;

       Uart_Printf("\n\nDownload the PCM(no ADPCM) file by DNW serial port(With header)!!\n");
       Uart_Printf("Download Start Address: 0x%x\n", Buf);

       while(((unsigned int)_temp - (unsigned int)Buf) < 4)
       {
   	 	//Led_Display(0);
   	  	Delay(1500);
   	  	//Led_Display(15);
   		Delay(1500);
       }
       
       size = *(Buf) | *(Buf + 1)<<8 | *(Buf + 2)<<16 | *(Buf + 3)<<24;
       Uart_Printf("\nNow, Downloading... [ File Size : %7d  	    0]", size);
      
    	while(((unsigned int)_temp - (unsigned int)Buf) < size) 
		Uart_Printf("\b\b\b\b\b\b\b\b%7d ",(unsigned int)_temp - (unsigned int)Buf);
	
    	Uart_Printf("\b\b\b\b\b\b\b\b%7d ]\n",(unsigned int)_temp - (unsigned int)Buf);

		rINTSUBMSK |= BIT_SUB_RXD1;
   
       size = *(Buf + 0x2c) | *(Buf + 0x2d)<<8 | *(Buf + 0x2e)<<16 | *(Buf + 0x2f)<<24;
       size = (size>>1)<<1;

       fs   = *(Buf + 0x1c) | *(Buf + 0x1d)<<8 | *(Buf + 0x1e)<<16 | *(Buf + 0x1f)<<24;

       Uart_Printf("Sample PCM Data Size = %d\n", size);
       Uart_Printf("Sampling Frequency = %d Hz\n", fs);

}

void Open_Wave_File(char *filename)
{
	int fd;
	int readsize;
    Buf   = (unsigned char *)0x31000000;
    
	fd = open(filename, 0);
	if((readsize = read(fd, Buf, 0x800)) <= 0)
	{
		Uart_Printf("open file:%s error!\n", filename);
		return;
	}
	close(fd);

       size = *(Buf + 0x2c) | *(Buf + 0x2d)<<8 | *(Buf + 0x2e)<<16 | *(Buf + 0x2f)<<24;
       size = (size>>1)<<1;


	fd = open(filename, 0);
	if((readsize = read(fd, Buf, size)) <=0)
	{
		Uart_Printf("open file:%s error!\n", filename);
		return;
	}

	close(fd);
	
	
       size = *(Buf + 0x2c) | *(Buf + 0x2d)<<8 | *(Buf + 0x2e)<<16 | *(Buf + 0x2f)<<24;
       size = (size>>1)<<1;

       fs   = *(Buf + 0x1c) | *(Buf + 0x1d)<<8 | *(Buf + 0x1e)<<16 | *(Buf + 0x1f)<<24;

       Uart_Printf("Sample PCM Data Size = %d\n", size);
       Uart_Printf("Sampling Frequency = %d Hz\n", fs);
}

void IIS_RecSound_DMA1(int mode, U32 rec_size)
{
	pISR_DMA1  = (unsigned)DMA1_Rec_Done;

	if (IIS_MasterClk_Sel == 0)	//IIS Master Clock Source = PCLK
      	{
      		rIISCON = (1<<4) + (1<<3) + (1<<1);	   
      		rIISMOD = (0<<9)+(0<<8) + (1<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);
    		rIISFCON = (1<<14) + (1<<12);	  
    	
		Uart_Printf("\nIISLRCK = %d Hz", (int) IIS_Codec_CLK/384);
      	}
      	else	   //IIS Master Clock Source = MPLLin
      	{
		rIISCON = (1<<4) + (1<<3) + (1<<1);	   
      		rIISMOD = (1<<9)+(0<<8) + (1<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);
    		rIISFCON = (1<<14) + (1<<12);	  
    	
		Uart_Printf("\nIISLRCK = %d Hz", (int) IIS_Codec_CLK/384);
      	}

 	rINTMSK = ~(BIT_DMA1);

	//--- DMA1 Initialize
       rDISRCC1 = (1<<1) + (1<<0);   
       rDISRC1  = ((U32)IISFIFO);    
       rDIDSTC1 = (0<<1) + (0<<0);     
       rDIDST1  = (int)rec_buf;                            
       rDCON1   = (1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(1<<22)+(1<<20)+(rec_size/2);
       rDMASKTRIG1 = (0<<2) + (1<<1) + 0;    //No-stop, DMA1 channel on, No-sw trigger

	if(mode ==1)
	Uart_Printf("\n\nAre you ready to record sound via MIC-In on SMDK2440?");
	if(mode ==2)
	Uart_Printf("\n\nAre you ready to record sound via Line-In on SMDK2440?");
	
       Uart_Printf("\nPress any key to start record!\n");
       Uart_Getch();
       Uart_Printf("Recording...\n");
   
   	//IIS Rx start
       rIISCON |= 0x1;
   
       while(!Rec_Done)
	{
        	Uart_Printf(".");
         	Delay(2000);
       }
   
       Rec_Done = 0;

	//IIS Rx stop
       Delay(10);				//For end of H/W Rx
       rIISCON     = 0x0;			//IIS stop
       rDMASKTRIG1 = (1<<2);	//DMA1 stop
	rIISFCON    = 0x0;			//For FIFO flush
	
	rINTMSK  |= (BIT_DMA1);
    	Uart_Printf("\nEnd of Record!\n");	
    	
}


void IIS_PlayWave_DMA2(unsigned char *start_addr, U32 play_size)
{
	pISR_DMA2  = (unsigned)DMA2_Done;
    	pISR_EINT0 = (unsigned)Muting;

    	if (IIS_MasterClk_Sel == 0)	//IIS Master Clock Source = PCLK
      	{
      		rIISCON = (1<<5) + (1<<2) + (1<<1);	   
      		rIISMOD = (0<<9)+(0<<8) + (2<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);
    		rIISFCON = (1<<15) + (1<<13);	  
    	
		Uart_Printf("\nIISLRCK = %d Hz", (int) IIS_Codec_CLK/384);
      	}
      	else	   //IIS Master Clock Source = MPLLin
      	{
		rIISCON = (1<<5) + (1<<2) + (0<<1);	   
		rIISMOD = (1<<9)+(0<<8) + (2<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);
		rIISFCON = (1<<15) + (1<<13);
	
		Uart_Printf("\nIISLRCK = %d Hz", (int) IIS_Codec_CLK/384);
      	}

	rINTMSK    = ~(BIT_EINT0 | BIT_DMA2);
	
	//DMA2 Register Setting 
	rDISRC2  = (int)(start_addr); 
       rDISRCC2 = (0<<1) + (0<<0); 		  
       rDIDST2  = ((U32)IISFIFO);			
	rDIDSTC2 = (0<<2) + (1<<1) + (1<<0);				
	rDCON2   = (1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(0<<24)+(1<<23)+(0<<22)+(1<<20)+(play_size/2);
       rDMASKTRIG2 = (0<<2) + (1<<1) + (0<<0);	    //No-stop, DMA2 channel On, and No-sw trigger 
    
	Uart_Printf("\nIf you want to mute or no mute, Push the 'EIN0' button repeatedly.\n");
    	Uart_Printf("Press any key to exit!\n");
	Uart_Printf("\nPlay...\n");
  
	//IIS Tx Start
    	rIISCON |= 0x1;		 //IIS Interface start
		
    	while(!Uart_GetKey());
    	
    	//IIS Tx Stop
    	Delay(10);			 //For end of H/W Tx
    	rIISCON	&= ~(1<<0);	    //IIS Interface stop

    	rDMASKTRIG2  = (1<<2);	 //DMA2 stop
	rIISFCON = 0x0;	    //For FIFO flush
		
	rINTMSK |= (BIT_EINT0 | BIT_DMA2);
	 	
	Uart_Printf("\nEnd of Play!\n");
}

void Select_IIS_Master_CLK(void)
{
	int sel;
	
	//Uart_Printf("\nIIS Master Clock Source => MPLLin\n");
#if	0
	Uart_Printf("\nSelect IIS Master Clock Source\n");
	Uart_Printf("0:PCLK, 1:MPLLin\n");
	sel = Uart_GetIntNum();		
#else
	sel = 0;
#endif
	switch(sel)
	{
		case 0 : 
		//IIS Pre-scaler Setting
	  	rIISPSR = (2<<5) + 2;  
		rIISMOD = (0<<9);

//		ChangeClockDivider(13,12); //FCLK:HCLK:PCLK =295MHz:98.33MHz:49.2MHz 
//		ChangeMPllValue(97,1,2);	//295Mhz
       
		Delay(100);

//		Calc_Clock(0);

//		UPDATE_REFRESH(Hclk);

		Uart_Init(PCLK, 115200);
		Uart_Select(2);
		Uart_TxEmpty(2);
		Delay(0);	//calibrate Delay()

		//In case PCLK = 50 MHz, IIS Codec CLK = 50/(5+1) = 8.34MHz
		Uart_Printf("\nIIS Master CLK(PCLK) = %4.2f MHz", (float)PCLK/MEGA);
		IIS_Codec_CLK = (float)PCLK/3;
		Uart_Printf("\nIIS Codec CLK = %4.2f MHz", IIS_Codec_CLK/MEGA);

		IIS_MasterClk_Sel = 0;	
      		break;

		case 1 : 
		rIISMOD = (1<<9);
		Uart_Printf("\nIIS Master CLK(MPLLin) = %4.2f MHz", (float)FIN/MEGA);
		IIS_Codec_CLK = (float)FIN;
		Uart_Printf("\nIIS Codec CLK = %4.2f MHz", IIS_Codec_CLK/MEGA);

		IIS_MasterClk_Sel = 1;
		break;

		default : 
		rIISMOD = (1<<9);
		Uart_Printf("\nIIS Master CLK(MPLLin) = %4.2f MHz", (float)FIN/MEGA);
		IIS_Codec_CLK = (float)FIN;
		Uart_Printf("\nIIS Codec CLK = %4.2f MHz", IIS_Codec_CLK/MEGA);

		IIS_MasterClk_Sel = 1;
		break;		
	}
}


//Initialization of UDA1341 Audio Codec using L3 Interface 
void Init1341(int mode)
{
 	//Port Initialize
	//----------------------------------------------------------
	//   PORT B GROUP
	//Ports  :   GPB4    GPB3   GPB2  
	//Signal :  L3CLOCK L3DATA   L3MODE
	//Setting:  OUTPUT   OUTPUT  OUTPUT 
	//	          [9:8]       [7:6]      [5:4]
	//Binary :    01,          01,        01 
	//----------------------------------------------------------    
       rGPBDAT = rGPBDAT & ~(L3M|L3C|L3D) |(L3M|L3C); //Start condition : L3M=H, L3C=H
       rGPBUP  = rGPBUP  & ~(0x7<<2) |(0x7<<2);	 //The pull up function is disabled GPB[4:2] 1 1100    
    	rGPBCON = rGPBCON & ~(0x3f<<4) |(0x15<<4);     //GPB[4:2]=Output(L3CLOCK):Output(L3DATA):Output(L3MODE)

	//L3 Interface
    	_WrL3Addr(0x14 + 2);     //STATUS (000101xx+10)
 	_WrL3Data(0x50,0);	 //0,1,01, 000,0 : Status 0,Reset, 384fs,IIS-bus,no DC-filtering

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