📄 i2c.lst
字号:
262 ; Set_SCL_High;
0005 D295 263 SETB SCL
0007 D295 264 SETB SCL
0009 265 ?C0018:
266 ; while(SCL_Low){};
0009 3095FD 267 JNB SCL,?C0018
000C 268 ?C0019:
269 ; cRetval = (SDA_High)? (cRetval|(1<<(7-ix))):cRetval ; /* MSB First */
000C 30961D 270 JNB SDA,?C0020
000F C3 271 CLR C
0010 7407 272 MOV A,#07H
0012 9C 273 SUBB A,R4
0013 FF 274 MOV R7,A
0014 7401 275 MOV A,#01H
0016 7E00 276 MOV R6,#00H
0018 A807 277 MOV R0,AR7
001A 08 278 INC R0
001B 8005 279 SJMP ?C0032
001D 280 ?C0031:
001D C3 281 CLR C
001E 33 282 RLC A
001F CE 283 XCH A,R6
0020 33 284 RLC A
0021 CE 285 XCH A,R6
0022 286 ?C0032:
0022 D8F9 287 DJNZ R0,?C0031
0024 FF 288 MOV R7,A
0025 ED 289 MOV A,R5
0026 FB 290 MOV R3,A
0027 EF 291 MOV A,R7
0028 4B 292 ORL A,R3
0029 FF 293 MOV R7,A
002A 8002 294 SJMP ?C0021
002C 295 ?C0020:
002C ED 296 MOV A,R5
002D FF 297 MOV R7,A
002E 298 ?C0021:
002E AD07 299 MOV R5,AR7
300 ; Set_SCL_Low;
0030 C295 301 CLR SCL
0032 C295 302 CLR SCL
303 ; }
0034 0C 304 INC R4
0035 EC 305 MOV A,R4
0036 B408CC 306 CJNE A,#08H,?C0015
0039 307 ?C0016:
308 ;
309 ; if(cNum==1)
0039 E9 310 MOV A,R1
003A B40106 311 CJNE A,#01H,?C0022
312 ; Set_SDA_High;
003D D296 313 SETB SDA
003F D296 314 SETB SDA
0041 8004 315 SJMP ?C0023
0043 316 ?C0022:
317 ; else
318 ; Set_SDA_Low;
0043 C296 319 CLR SDA
0045 C296 320 CLR SDA
0047 321 ?C0023:
A51 MACRO ASSEMBLER I2C 11/23/2007 00:57:18 PAGE 6
322 ; Set_SCL_High;
0047 D295 323 SETB SCL
0049 D295 324 SETB SCL
004B 325 ?C0024:
326 ; while(SCL_Low){};
004B 3095FD 327 JNB SCL,?C0024
004E 328 ?C0025:
329 ; Set_SCL_Low;
004E C295 330 CLR SCL
0050 C295 331 CLR SCL
332 ; Set_SDA_High;
0052 D296 333 SETB SDA
0054 D296 334 SETB SDA
335 ; return cRetval;
0056 AF05 336 MOV R7,AR5
337 ; }
0058 338 ?C0026:
0058 22 339 RET
340 ; END OF _Read_Byte
341
342 ;
343 ; =============================================================================
344 ; void twdWr_Burst_D(uCHAR cData)
345 ; =============================================================================
346
---- 347 RSEG ?PR?_twdWr_Burst_D?I2C
0000 348 _twdWr_Burst_D:
349 USING 0
350 ; {
351 ; ACC=cData;
0000 EF 352 MOV A,R7
0001 353 ?C0027:
354 ; { send 8bit from MSB to LSB
355 ; Set_SCL2Low;
0001 C295 356 CLR SCL
357 ; Setting SDA (Data bit-7)
0003 33 358 RLC A
0004 9296 359 MOV SDA,C
360 ; Setup SCL to high
0006 D295 361 SETB SCL
362 ; Bit-6
0008 33 363 RLC A
0009 C295 364 CLR SCL
000B 9296 365 MOV SDA,C
000D D295 366 SETB SCL
367 ; Bit-5
000F 33 368 RLC A
0010 C295 369 CLR SCL
0012 9296 370 MOV SDA,C
0014 D295 371 SETB SCL
372 ; Bit-4
0016 33 373 RLC A
0017 C295 374 CLR SCL
0019 9296 375 MOV SDA,C
001B D295 376 SETB SCL
377 ; Bit-3
001D 33 378 RLC A
001E C295 379 CLR SCL
0020 9296 380 MOV SDA,C
0022 D295 381 SETB SCL
382 ; Bit-2
0024 33 383 RLC A
0025 C295 384 CLR SCL
0027 9296 385 MOV SDA,C
0029 D295 386 SETB SCL
387 ; Bit-1
A51 MACRO ASSEMBLER I2C 11/23/2007 00:57:18 PAGE 7
002B 33 388 RLC A
002C C295 389 CLR SCL
002E 9296 390 MOV SDA,C
0030 D295 391 SETB SCL
392 ; Bit-0
0032 33 393 RLC A
0033 C295 394 CLR SCL
0035 9296 395 MOV SDA,C
0037 D295 396 SETB SCL
397 ; }
0039 398 ?C0028:
399 ; Set_SCL2Low;
0039 C295 400 CLR SCL
003B 00 401 NOP
402 ; Set_SDA2High; /* release data line for acknowledge */
003C D296 403 SETB SDA
003E 00 404 NOP
405 ; Set_SCL2High; /* Send a clock for Acknowledge */
003F D295 406 SETB SCL
0041 00 407 NOP
408 ; Set_SCL2Low; /* Finish Acknoledge */
0042 C295 409 CLR SCL
0044 00 410 NOP
411 ; }
0045 22 412 RET
413 ; END OF _twdWr_Burst_D
414
415 END
A51 MACRO ASSEMBLER I2C 11/23/2007 00:57:18 PAGE 8
SYMBOL TABLE LISTING
------ ----- -------
N A M E T Y P E V A L U E ATTRIBUTES
?C0001 . . . . . . . . C ADDR 0004H R SEG=?PR?STARTCONDITION?I2C
?C0004 . . . . . . . . C ADDR 001AH R SEG=?PR?STARTCONDITION?I2C
?C0005 . . . . . . . . C ADDR 000AH R SEG=?PR?STOPCONDITION?I2C
?C0006 . . . . . . . . C ADDR 0011H R SEG=?PR?STOPCONDITION?I2C
?C0008 . . . . . . . . C ADDR 0005H R SEG=?PR?_SEND_BYTE?I2C
?C0009 . . . . . . . . C ADDR 0016H R SEG=?PR?_SEND_BYTE?I2C
?C0011 . . . . . . . . C ADDR 0022H R SEG=?PR?_SEND_BYTE?I2C
?C0012 . . . . . . . . C ADDR 0025H R SEG=?PR?_SEND_BYTE?I2C
?C0013 . . . . . . . . C ADDR 002AH R SEG=?PR?_SEND_BYTE?I2C
?C0014 . . . . . . . . C ADDR 0030H R SEG=?PR?_SEND_BYTE?I2C
?C0015 . . . . . . . . C ADDR 0005H R SEG=?PR?_READ_BYTE?I2C
?C0016 . . . . . . . . C ADDR 0039H R SEG=?PR?_READ_BYTE?I2C
?C0018 . . . . . . . . C ADDR 0009H R SEG=?PR?_READ_BYTE?I2C
?C0019 . . . . . . . . C ADDR 000CH R SEG=?PR?_READ_BYTE?I2C
?C0020 . . . . . . . . C ADDR 002CH R SEG=?PR?_READ_BYTE?I2C
?C0021 . . . . . . . . C ADDR 002EH R SEG=?PR?_READ_BYTE?I2C
?C0022 . . . . . . . . C ADDR 0043H R SEG=?PR?_READ_BYTE?I2C
?C0023 . . . . . . . . C ADDR 0047H R SEG=?PR?_READ_BYTE?I2C
?C0024 . . . . . . . . C ADDR 004BH R SEG=?PR?_READ_BYTE?I2C
?C0025 . . . . . . . . C ADDR 004EH R SEG=?PR?_READ_BYTE?I2C
?C0026 . . . . . . . . C ADDR 0058H R SEG=?PR?_READ_BYTE?I2C
?C0027 . . . . . . . . C ADDR 0001H R SEG=?PR?_TWDWR_BURST_D?I2C
?C0028 . . . . . . . . C ADDR 0039H R SEG=?PR?_TWDWR_BURST_D?I2C
?C0031 . . . . . . . . C ADDR 001DH R SEG=?PR?_READ_BYTE?I2C
?C0032 . . . . . . . . C ADDR 0022H R SEG=?PR?_READ_BYTE?I2C
?PR?STARTCONDITION?I2C C SEG 001BH REL=UNIT
?PR?STOPCONDITION?I2C. C SEG 0018H REL=UNIT
?PR?_READ_BYTE?I2C . . C SEG 0059H REL=UNIT
?PR?_SEND_BYTE?I2C . . C SEG 0031H REL=UNIT
?PR?_TWDWR_BURST_D?I2C C SEG 0046H REL=UNIT
AC . . . . . . . . . . B ADDR 00D0H.6 A
ACC. . . . . . . . . . D ADDR 00E0H A
AR5. . . . . . . . . . D ADDR 0005H A
AR6. . . . . . . . . . D ADDR 0006H A
AR7. . . . . . . . . . D ADDR 0007H A
B. . . . . . . . . . . D ADDR 00F0H A
BSDA_MSB . . . . . . . B ADDR 00E0H.7 A
CY . . . . . . . . . . B ADDR 00D0H.7 A
DPH. . . . . . . . . . D ADDR 0083H A
DPL. . . . . . . . . . D ADDR 0082H A
EA . . . . . . . . . . B ADDR 00A8H.7 A
ES . . . . . . . . . . B ADDR 00A8H.4 A
ET0. . . . . . . . . . B ADDR 00A8H.1 A
ET1. . . . . . . . . . B ADDR 00A8H.3 A
EX0. . . . . . . . . . B ADDR 00A8H.0 A
EX1. . . . . . . . . . B ADDR 00A8H.2 A
F0 . . . . . . . . . . B ADDR 00D0H.7 A
I2C. . . . . . . . . . N NUMB -----
IE . . . . . . . . . . D ADDR 00A8H A
IE0. . . . . . . . . . B ADDR 0088H.1 A
IE1. . . . . . . . . . B ADDR 0088H.3 A
INT0 . . . . . . . . . B ADDR 00B0H.2 A
INT1 . . . . . . . . . B ADDR 00B0H.3 A
IP . . . . . . . . . . D ADDR 00B8H A
IT0. . . . . . . . . . B ADDR 0088H.0 A
IT1. . . . . . . . . . B ADDR 0088H.2 A
OV . . . . . . . . . . B ADDR 00D0H.2 A
P. . . . . . . . . . . B ADDR 00D0H.0 A
P0 . . . . . . . . . . D ADDR 0080H A
P1 . . . . . . . . . . D ADDR 0090H A
A51 MACRO ASSEMBLER I2C 11/23/2007 00:57:18 PAGE 9
P2 . . . . . . . . . . D ADDR 00A0H A
P3 . . . . . . . . . . D ADDR 00B0H A
PCON . . . . . . . . . D ADDR 0087H A
PS . . . . . . . . . . B ADDR 00B8H.4 A
PSW. . . . . . . . . . D ADDR 00D0H A
PT0. . . . . . . . . . B ADDR 00B8H.1 A
PT1. . . . . . . . . . B ADDR 00B8H.3 A
PX0. . . . . . . . . . B ADDR 00B8H.0 A
PX1. . . . . . . . . . B ADDR 00B8H.2 A
RB8. . . . . . . . . . B ADDR 0098H.2 A
RD . . . . . . . . . . B ADDR 00B0H.7 A
REN. . . . . . . . . . B ADDR 0098H.4 A
RI . . . . . . . . . . B ADDR 0098H.0 A
RS0. . . . . . . . . . B ADDR 00D0H.3 A
RS1. . . . . . . . . . B ADDR 00D0H.4 A
RXD. . . . . . . . . . B ADDR 00B0H.0 A
SBUF . . . . . . . . . D ADDR 0099H A
SCL. . . . . . . . . . B ADDR 0090H.5 A
SCON . . . . . . . . . D ADDR 0098H A
SDA. . . . . . . . . . B ADDR 0090H.6 A
SM0. . . . . . . . . . B ADDR 0098H.7 A
SM1. . . . . . . . . . B ADDR 0098H.6 A
SM2. . . . . . . . . . B ADDR 0098H.5 A
SP . . . . . . . . . . D ADDR 0081H A
STARTCONDITION . . . . C ADDR 0000H R SEG=?PR?STARTCONDITION?I2C
STOPCONDITION. . . . . C ADDR 0000H R SEG=?PR?STOPCONDITION?I2C
T0 . . . . . . . . . . B ADDR 00B0H.4 A
T1 . . . . . . . . . . B ADDR 00B0H.5 A
TB8. . . . . . . . . . B ADDR 0098H.3 A
TF0. . . . . . . . . . B ADDR 0088H.5 A
TF1. . . . . . . . . . B ADDR 0088H.7 A
TH0. . . . . . . . . . D ADDR 008CH A
TH1. . . . . . . . . . D ADDR 008DH A
TI . . . . . . . . . . B ADDR 0098H.1 A
TL0. . . . . . . . . . D ADDR 008AH A
TL1. . . . . . . . . . D ADDR 008BH A
TMOD . . . . . . . . . D ADDR 0089H A
TR0. . . . . . . . . . B ADDR 0088H.4 A
TR1. . . . . . . . . . B ADDR 0088H.6 A
TXD. . . . . . . . . . B ADDR 00B0H.1 A
WR . . . . . . . . . . B ADDR 00B0H.6 A
_READ_BYTE . . . . . . C ADDR 0000H R SEG=?PR?_READ_BYTE?I2C
_SEND_BYTE . . . . . . C ADDR 0000H R SEG=?PR?_SEND_BYTE?I2C
_TWDWR_BURST_D . . . . C ADDR 0000H R SEG=?PR?_TWDWR_BURST_D?I2C
REGISTER BANK(S) USED: 0
ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S)
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