📄 cstartup.lst
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310 000098 ;---------------------------------------;
311 000098 small_copy_mem
312 000098 A000 LDY #0
313 00009A small_loop
314 00009A B1.. LDA (?DP0_L00),Y
315 00009C 91.. STA (?DP1_L00),Y
316 00009E C8 INY
317 00009F CA DEX
318 0000A0 D0F8 BNE small_loop
319 0000A2 60 return RTS
320 0000A3
321 0000A3
322 0000A3 large_copy_mem
323 0000A3 A000 LDY #0
324 0000A5 large_loop
325 0000A5 B1.. LDA (?DP0_L00),Y
326 0000A7 91.. STA (?DP1_L00),Y
327 0000A9 C8 INY
328 0000AA D0F9 BNE large_loop
329 0000AC EE.... INC ?DP0_L00+1 ; update
high
pointers
330 0000AF EE.... INC ?DP1_L00+1
331 0000B2 CA DEX
332 0000B3 D0F0 BNE large_loop ; no, move
next
block
333 0000B5 60 RTS
334 0000B6
335 0000B6
336 0000B6 ;---------------------------------------------------
------------;
337 0000B6 ; Interrupt vectors must be inserted here by the
user. ;
338 0000B6 ;
;
339 0000B6 ; It is assumed that the interrupt vector segment
starts ;
340 0000B6 ; at address xxE0 on all chips except 37600 where it
is ;
341 0000B6 ; starts at xxC0. The reset vector is assumed to be
located ;
342 0000B6 ; at xxF?. We simply skip to xxF? and insert the
reset vector. ;
343 0000B6 ;
;
344 0000B6 ; Chip group Default reset vector
;
345 0000B6 ; ------------------------------------------
;
346 0000B6 ; -v0 FFFC
;
347 0000B6 ; -v1 FFFE
;
348 0000B6 ; -v2 FFFA
;
349 0000B6 ;
;
350 0000B6 ; If this does not match your specific chip
derivative, you ;
351 0000B6 ; have to make changes below.
;
352 0000B6 ;---------------------------------------------------
------------;
353 0000B6
354 000000 EXTERN BRK_int,T1_int,AD_int,TA_int
,TX_int,CNTR_int1,CNTR_int0,KeyWake_int
355 000000 EXTERN I_1,I_0,TR_int,RE_int
356 000000 COMMON INTVEC
357 000000
358 000000 ;EXTERN ; EXTERN directive
359 000000 COMMON INTVEC ; FFDC - FFFB, FFFC
- FFFD
360 000000 ?CSTARTUP_INTVEC:
361 000000 .... WORD BRK_int ; FFDC : BRK
362 000002 .... WORD init_C ; Reserved
Area
363 000004 .... WORD T1_int ; FFE0 : Timer1
364 000006 .... WORD AD_int ; FFE2 : AD
365 000008 .... WORD init_C ; Reserved
Area
366 00000A .... WORD TA_int ; FFE6 : TimerA
367 00000C .... WORD init_C ; Reserved
Area
368 00000E .... WORD init_C ; Reserved
Area
369 000010 .... WORD TX_int ; FFEC : TimerX
370 000012 .... WORD CNTR_int1 ; FFEE : CNTR1
371 000014 .... WORD CNTR_int0 ; FFF0 : CNTR0
372 000016 .... WORD KeyWake_int ; FFF2 : Key-on
wake-up
373 000018 .... WORD I_1 ; FFF4 : INT1
374 00001A .... WORD I_0 ; FFF6 : INT0
375 00001C .... WORD TR_int ; FFF8 : Serial I/O
transmit
376 00001E .... WORD RE_int ; FFFA : Serial I/O
receive
377 000020 ?CSTARTUP_RESETVEC:
378 000020 .... WORD init_C ; FFFC : RESET
379 000022 ENDMOD init_C
##############################
# CRC:6E50 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 217 #
##############################
###############################################################################
# #
# IAR Systems 740 Assembler V2.17A/W32 16/Nov/2005 23:06:02 #
# Copyright 1995-2003 IAR Systems. All rights reserved. #
# #
# Target option = 740 with MUL/DIV #
# Source file = cstartup.s31 #
# List file = cstartup.lst #
# Object file = .\cstartup.r31 #
# Command line = -uN -r -L -v0 -o .\cstartup.r31 cstartup.s31 #
# #
###############################################################################
380 000000
381 000000
382 000000 ;---------------------------------------------------
------------;
383 000000 ; Function/module: exit (int code)
;
384 000000 ;
;
385 000000 ; When C-SPY is used this code will automatically be
replaced ;
386 000000 ; by a 'debug' version of exit().
;
387 000000 ;---------------------------------------------------
------------;
388 000000 MODULE exit
389 000000
390 000000 PUBLIC exit
391 000000 DEFFN exit(0,0,0,0,32770,0,0,0)
392 000000 PUBLIC ?C_EXIT
393 000000
394 000000 RSEG RCODE
395 000000
396 000000 ?C_EXIT
397 000000 exit
398 000000
399 000000 ;---------------------------------------------------
-----------;
400 000000 ; The next line can be replaced by user defined
code. ;
401 000000 ;---------------------------------------------------
-----------;
402 000000 80FE BRA *
403 000002
404 000002 ENDMOD
##############################
# CRC:1D21 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 2 #
##############################
###############################################################################
# #
# IAR Systems 740 Assembler V2.17A/W32 16/Nov/2005 23:06:02 #
# Copyright 1995-2003 IAR Systems. All rights reserved. #
# #
# Target option = 740 with MUL/DIV #
# Source file = cstartup.s31 #
# List file = cstartup.lst #
# Object file = .\cstartup.r31 #
# Command line = -uN -r -L -v0 -o .\cstartup.r31 cstartup.s31 #
# #
###############################################################################
405 000000
406 000000
407 000000 ;---------------------------------------------------
------------;
408 000000 ; Function/module: default __low_level_init
;
409 000000 ; You can replace this routine by linking with your
own version.;
410 000000 ; The default action is to do nothing and return 1.
;
411 000000 ;---------------------------------------------------
------------;
412 000000
413 000000 MODULE lowinit
414 000000
415 000000 PUBLIC __low_level_init
416 000000 DEFFN __low_level_init(0,0,0,0,32768,0,0,0
)
417 000000 RSEG RCODE
418 000000 __low_level_init
419 000000 A901 LDA #1
420 000002 60 RTS
421 000003
422 000003 END
##############################
# CRC:786E #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 3 #
# Modules: 3 #
# Total errors: 0 #
# Total warnings: 0 #
##############################
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