📄 simhw.c
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NTSTATUS SIM_Deactivate(PCSP_SIM_REG pSIMReg)
{
NTSTATUS NTStatus = STATUS_SUCCESS;
SmartcardDebug( DEBUG_DRIVER,( TEXT("+SIM_Deactivate\n") ));
if (g_PortSelect == PORT0)
{
// RST shall be put to 0
INSREG32BF(&pSIMReg->PORT0_CNTL, SIM_PORT0_CNTL_SRST, SIM_PORT0_CNTL_SRST_DISABLE);
// CLK shall be put to 0
INSREG32BF(&pSIMReg->PORT0_CNTL, SIM_PORT0_CNTL_SCSP, SIM_PORT0_CNTL_SCSP_DISABLE);
// I/O shall be put to 0
INSREG32BF(&pSIMReg->PORT0_CNTL, SIM_PORT0_CNTL_STEN, SIM_PORT0_CNTL_STEN_DISABLE);
// VCC shall be deactivate
INSREG32BF(&pSIMReg->PORT0_CNTL, SIM_PORT0_CNTL_SVEN, SIM_PORT0_CNTL_SVEN_DISABLE);
INSREG32BF(&pSIMReg->PORT0_CNTL, SIM_PORT0_CNTL_3VOLT, SIM_PORT0_CNTL_3VOLT_DISABLE);
}
else
{
// RST shall be put to 0
INSREG32BF(&pSIMReg->PORT1_CNTL, SIM_PORT1_CNTL_SRST, SIM_PORT1_CNTL_SRST_DISABLE);
// CLK shall be put to 0
INSREG32BF(&pSIMReg->PORT1_CNTL, SIM_PORT1_CNTL_SCSP, SIM_PORT1_CNTL_SCSP_DISABLE);
// I/O shall be put to 0
INSREG32BF(&pSIMReg->PORT1_CNTL, SIM_PORT1_CNTL_STEN, SIM_PORT1_CNTL_STEN_DISABLE);
// VCC shall be deactivate
INSREG32BF(&pSIMReg->PORT1_CNTL, SIM_PORT1_CNTL_SVEN, SIM_PORT1_CNTL_SVEN_DISABLE);
INSREG32BF(&pSIMReg->PORT1_CNTL, SIM_PORT1_CNTL_3VOLT, SIM_PORT1_CNTL_3VOLT_DISABLE);
}
SmartcardDebug( DEBUG_DRIVER,( TEXT("-SIM_Deactivate\n") ));
return(STATUS_SUCCESS);
}
//-----------------------------------------------------------------------------
//
// Function: SIM_ConfigCLK
//
// This function configures the clock and baud rate for sim
//
// Parameters:
// pSIMReg
// [in]Pointer of the startingl address of SIM register structures
// Fi
// [in]Clock correction factor
// Di
// [in]Data rate adjustment factor
//
// Returns:
// BOOL true means success false means fail
//
//-----------------------------------------------------------------------------
BOOL SIM_ConfigCLK(PCSP_SIM_REG pSIMReg, UINT8 Fi, UINT8 Di)
{
int baudrate, freq;
UINT32 sim_clock;
SmartcardDebug( DEBUG_DRIVER,( TEXT("+SIM_ConfigCLK\n") ));
if ((Fi == (UINT8)0) && (Di == (UINT8)0x1)) /* Fd and Dd */
return TRUE;
if ((Fi == (UINT8)0) && (Di == (UINT8)0x0)) /* Fd and Dd */
return TRUE;
// Search and check Fi and fmax in Clock Rate Factor table
if (g_crf[(INT8)Fi].f == RFU)
{
DEBUGMSG(1,(TEXT("Unsupported f : %d\r\n"),g_crf[(UINT8)Fi].f));
return FALSE;
}
// Search and check Di in Baud Rate Factor table
if (g_brf[(INT8)Di].Di == RFU)
{
DEBUGMSG(1,(TEXT("Unsupported f : %02x\r\n"),Di));
return FALSE;
}
// Reconfigure the CLK_SEL
sim_clock = BSPGetSIMCLK();
freq = (int)sim_clock/(g_crf[Fi].f*MHz);
DEBUGMSG(1,(TEXT("frep:%d = %d MHz / %d MHz\r\n"),freq,sim_clock/MHz,g_crf[Fi].f));
switch (freq)
{
case 1:
case 2:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x0);
break;
case 3:
case 4:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x1);
break;
case 5:
case 6:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x2);
break;
case 7:
case 8:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x3);
break;
case 9:
case 10:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x4);
break;
case 11:
case 12:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x5);
break;
case 13:
case 14:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x6);
break;
case 15:
case 16:
INSREG32BF(&pSIMReg->CLOCK_SELECT, SIM_CLOCK_SELECT, 0x7);
break;
default:
DEBUGMSG(1,(TEXT("Unsupported CLK_SEL\r\n")));
return FALSE;
}
// Reconfigure BAUD_SEL
baudrate = (int)g_crf[Fi].Fi/g_brf[Di].Di;
DEBUGMSG(1,(TEXT("Current baud rate : %d\r\n"),baudrate));
switch (baudrate)
{
case 372:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0x1);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0);
break;
case 256:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x1);
break;
case 128:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x2);
break;
case 64:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x3);
break;
case 32:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x4);
break;
case 16:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_SAMPLE12, 0);
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x6);
break;
default:
INSREG32BF(&pSIMReg->CNTL, SIM_CNTL_BAUD_SEL, 0x7);
INSREG32BF(&pSIMReg->DIVISOR, SIM_DIVISOR, (UINT8)baudrate & 0xff);
break;
}
SmartcardDebug( DEBUG_DRIVER,( TEXT("-SIM_ConfigCLK\n") ));
return TRUE;
}
//-----------------------------------------------------------------------------
//
// Function: SIM_ConfigTime
//
// This function configures the guard time and character wait time
//
// Parameters:
// pSIMReg
// [in]Pointer of the startingl address of SIM register structures
// N
// [in]Extra guard time needed
// WI
// [in]Waiting integer
//
// Returns:
// BOOL true means success false means fail
//
//-----------------------------------------------------------------------------
BOOL SIM_ConfigTime(PCSP_SIM_REG pSIMReg, UINT8 N, UINT8 WI)
{
SmartcardDebug( DEBUG_DRIVER,( TEXT("+SIM_ConfigTime\n") ));
if ( N == 0xFF )
{
N = 0;
}
//set the extra guard time
INSREG32BF(&pSIMReg->GUARD_CNTL, SIM_GUARD_CNTL_GETU, N);
//set the character wait time for T=0
INSREG32BF(&pSIMReg->CHAR_WAIT, SIM_CHAR_WAIT_CWT, WI);
SmartcardDebug( DEBUG_DRIVER,( TEXT("-SIM_ConfigTime\n") ));
return(TRUE);
}
//-----------------------------------------------------------------------------
//
// Function: SIM_ConfigTime
//
// This function configures the guard time and character wait time
//
// Parameters:
// pSIMReg
// [in]Pointer of the startingl address of SIM register structures
//
// Returns:
// BOOL true means card present false means card not present
//
//-----------------------------------------------------------------------------
BOOL SIM_CheckCard(PCSP_SIM_REG pSIMReg)
{
SmartcardDebug( DEBUG_DRIVER,( TEXT("SIM_CheckCard\n") ));
#if 0
if (g_PortSelect == PORT0)
{
if (EXTREG32BF(&pSIMReg->PORT0_DETECT, SIM_PORT0_DETECT_SPDP))
return(TRUE);
else
return(FALSE);
}
else
{
if (EXTREG32BF(&pSIMReg->PORT1_DETECT, SIM_PORT1_DETECT_SPDP))
return(TRUE);
else
return(FALSE);
}
#endif // Current implementation doesnt support Hot-Pluggability and hence assumed card is always present
return(TRUE);
}
//-----------------------------------------------------------------------------
//
// Function: SIM_MaskInterrupts
//
// This function masks all the interrupts for SIM
//
// Parameters:
// pSIMReg
// [in]Pointer of the startingl address of SIM register structures
//
// Returns:
// void
//
//-----------------------------------------------------------------------------
static void SIM_MaskInterrupts(PCSP_SIM_REG pSIMReg)
{
SmartcardDebug( DEBUG_DRIVER,( TEXT("+SIM_MaskInterrupts\n") ));
INSREG32BF(&pSIMReg->PORT1_DETECT, SIM_PORT1_DETECT_SDIM, SIM_PORT1_DETECT_SDIM_MASK);
INSREG32BF(&pSIMReg->PORT0_DETECT, SIM_PORT0_DETECT_SDIM, SIM_PORT0_DETECT_SDIM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_BGTM, SIM_INT_MASK_BGTM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_BWTM, SIM_INT_MASK_BWTM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_RTM, SIM_INT_MASK_RTM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_CWTM, SIM_INT_MASK_CWTM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_CPCNTM, SIM_INT_MASK_CPCNTM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_TDTFM, SIM_INT_MASK_TDTFM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_TFOM, SIM_INT_MASK_TFOM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_XMT, SIM_INT_MASK_XMT_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_TFEIM, SIM_INT_MASK_TFEIM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_ETCIM, SIM_INT_MASK_ETCIM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_OIM, SIM_INT_MASK_OIM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_TCIM, SIM_INT_MASK_TCIM_MASK);
INSREG32BF(&pSIMReg->INT_MASK, SIM_INT_MASK_RIM, SIM_INT_MASK_RIM_MASK);
SmartcardDebug( DEBUG_DRIVER,( TEXT("-SIM_MaskInterrupts\n") ));
}
//-----------------------------------------------------------------------------
//
// Function: SIM_FlushFIFO
//
// This function does the flushing for fifo
//
// Parameters:
// pSIMReg
// [in]Pointer of the startingl address of SIM register structures
//
// Returns:
// void
//
//-----------------------------------------------------------------------------
void SIM_FlushFIFO(PCSP_SIM_REG pSIMReg)
{
SmartcardDebug( DEBUG_DRIVER,( TEXT("+SIM_FlushFIFO\n") ));
INSREG32BF(&pSIMReg->RESET_CNTL, SIM_RESET_CNTL_FLUSH_XMT, SIM_RESET_CNTL_FLUSH_XMT_ENABLE);
INSREG32BF(&pSIMReg->RESET_CNTL, SIM_RESET_CNTL_FLUSH_RCV, SIM_RESET_CNTL_FLUSH_RCV_ENABLE);
Sleep(10);
INSREG32BF(&pSIMReg->RESET_CNTL, SIM_RESET_CNTL_FLUSH_XMT, SIM_RESET_CNTL_FLUSH_XMT_DISABLE);
INSREG32BF(&pSIMReg->RESET_CNTL, SIM_RESET_CNTL_FLUSH_RCV, SIM_RESET_CNTL_FLUSH_RCV_DISABLE);
SmartcardDebug( DEBUG_DRIVER,( TEXT("-SIM_FlushFIFO\n") ));
}
//-----------------------------------------------------------------------------
//
// Function: SIM_SelectPort
//
// This function tells the hw layer which SIM port to use
//
// Parameters:
// Port_select
// [in] port number to be used
//
// Returns:
// void
//
//-----------------------------------------------------------------------------
void SIM_SelectPort(DWORD Port_select)
{
g_PortSelect = Port_select;
}
void Dump_Registers(PCSP_SIM_REG pSIMReg)
{
DEBUGMSG (1, (TEXT("port1_cntl: %x \r\n"),INREG16(&pSIMReg->PORT1_CNTL)));
DEBUGMSG (1, (TEXT("SetupRegister: %x \r\n"),INREG16(&pSIMReg->SETUP)));
DEBUGMSG (1, (TEXT("port1detect: %x \r\n"),INREG16(&pSIMReg->PORT1_DETECT)));
DEBUGMSG (1, (TEXT("port0_cntl: %x \r\n"),INREG16(&pSIMReg->PORT0_CNTL)));
DEBUGMSG (1, (TEXT("ControlRegister: %x \r\n"),INREG16(&pSIMReg->CNTL)));
DEBUGMSG (1, (TEXT("clcok_select: %x \r\n"),INREG16(&pSIMReg->CLOCK_SELECT)));
DEBUGMSG (1, (TEXT("recieve_threshold: %x \r\n"),INREG16(&pSIMReg->RCV_THRESHOLD)));
DEBUGMSG (1, (TEXT("EnableReg: %x \r\n"),INREG16(&pSIMReg->ENABLE)));
DEBUGMSG (1, (TEXT("Txmt_status: %x \r\n"),INREG16(&pSIMReg->XMT_STATUS)));
DEBUGMSG (1, (TEXT("Rxv_status: %x \r\n"),INREG16(&pSIMReg->RCV_STATUS)));
DEBUGMSG (1, (TEXT("Int_mask: %x \r\n"),INREG16(&pSIMReg->INT_MASK)));
DEBUGMSG (1, (TEXT("port0_detect: %x \r\n"),INREG16(&pSIMReg->PORT0_DETECT)));
DEBUGMSG (1, (TEXT("Data_Format: %x \r\n"),INREG16(&pSIMReg->DATA_FORMAT)));
DEBUGMSG (1, (TEXT("Xmt_threshold: %x \r\n"),INREG16(&pSIMReg->XMT_THRESHOLD)));
DEBUGMSG (1, (TEXT("Guard_Cntl: %x \r\n"),INREG16(&pSIMReg->GUARD_CNTL)));
DEBUGMSG (1, (TEXT("OD_CONFIG: %x \r\n"),INREG16(&pSIMReg->OD_CONFIG)));
DEBUGMSG (1, (TEXT("Reset_Control: %x \r\n"),INREG16(&pSIMReg->RESET_CNTL)));
DEBUGMSG (1, (TEXT("Char_Wait: %x \r\n"),INREG16(&pSIMReg->CHAR_WAIT)));
DEBUGMSG (1, (TEXT("GPCOUNT: %x \r\n"),INREG16(&pSIMReg->GPCNT)));
DEBUGMSG (1, (TEXT("Divisor: %x \r\n"),INREG16(&pSIMReg->DIVISOR)));
DEBUGMSG (1, (TEXT("BWT: %x \r\n"),INREG16(&pSIMReg->BWT)));
DEBUGMSG (1, (TEXT("BGT: %x \r\n"),INREG16(&pSIMReg->BGT)));
}
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