serialhw.c

freescale i.mx31 BSP CE5.0全部源码

//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//      StopBits 
//          [in] ULONG StopBits field from DCB.
//
// Returns:  
//      TRUE if success. FALSE if failure.
//
//-----------------------------------------------------------------------------
BOOL SL_SetStopBits( PVOID pContext, ULONG StopBits )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;
    BOOL bRet = TRUE;

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetStopBits+ 0x%X\r\n"), StopBits));

    EnterCriticalSection(&(pHWHead->RegCritSec));    
    try {
        //Disable RX & TX
        
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_RXEN) );
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_TXEN) );
		
        switch ( StopBits ) {
            case ONESTOPBIT :
                OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_STPB) );
				break;
            case ONE5STOPBITS :
                bRet = FALSE;
                break;
            case TWOSTOPBITS :
                INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_STPB, UART_UCR2_STPB_2STOP);
				break;
            default:
                bRet = FALSE;
                break;
        }
        //Enable RX & TX
        
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_RXEN, UART_UCR2_RXEN_ENABLE);
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_TXEN, UART_UCR2_TXEN_ENABLE);
	}
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        bRet = FALSE;
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetStopBits-\r\n")));

    return(bRet);
}


//-----------------------------------------------------------------------------
//
// Function: SL_SetBaudRate
//
// This routine sets the baud rate of the device.
//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//      BaudRate 
//          [in] ULONG representing decimal baud rate.
//
// Returns:  
//      TRUE if success. FALSE if failure.
//
//-----------------------------------------------------------------------------
BOOL SL_SetBaudRate( PVOID pContext, ULONG BaudRate )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;
    BOOL bRet = TRUE;
    ULONG bRefFreq = UART_REF_FREQ;
    UCHAR bDIV = 0;
    
    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetbaudRate+ %d\r\n"),BaudRate));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
        if ((pHWHead->UseIrDA) && (BaudRate < IRSC_BAUDRATE)) {
            //IR special case;
            DEBUGMSG(ZONE_IR,(TEXT("IR special case!\r\n")));	
            INSREG32BF(&pHWHead->pUartReg->UCR4, UART_UCR4_IRSC, UART_UCR4_IRSC_REFCLK);
		}
        else {
            
			OUTREG32( &pHWHead->pUartReg->UCR4, INREG32(&pHWHead->pUartReg->UCR4)&~CSP_BITFMASK(UART_UCR4_IRSC) );
			
        }        
		bDIV = SL_CalculateRFDIV(&bRefFreq);
		
        INSREG32BF(&pHWHead->pUartReg->UFCR, UART_UFCR_RFDIV, bDIV);

		OUTREG32(&pHWHead->pUartReg->UBIR,UART_UBIR_INCREMENT( BaudRate ,UART_UBMR_MOD_DEFAULT,bRefFreq)-1);
        OUTREG32(&pHWHead->pUartReg->UBMR,UART_UBMR_MOD_DEFAULT -1);			
		
	    pHWHead->dcb.BaudRate = BaudRate;
    }except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        bRet = FALSE;
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetbaudRate- Ret = %d\r\n"), bRet));

    return(bRet);
}


//-----------------------------------------------------------------------------
//
// Function: SL_SetByteSize
//
// This routine sets the WordSize of the device.
//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//      ByteSize 
//          [in] ULONG ByteSize field from DCB.
//
// Returns:  
//      TRUE if success. FALSE if failure.
//
//-----------------------------------------------------------------------------
BOOL SL_SetByteSize( PVOID pContext, ULONG ByteSize )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;
    BOOL bRet = TRUE;

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetByteSize+ 0x%X\r\n"), ByteSize));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {

		//Disable RX & TX
        OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_RXEN) );
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_TXEN) );

        switch (ByteSize) {
            case 7:
				OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_WS) );

                break;
            
			case 8:
				INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_WS, UART_UCR2_WS_8BIT);
				
                break;
            default:
                bRet = FALSE;
                break;
        }
        //Enable RX & TX
        	
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_RXEN, UART_UCR2_RXEN_ENABLE);
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_TXEN, UART_UCR2_TXEN_ENABLE);
		
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        bRet = FALSE;
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetByteSize- Ret = %d\r\n"), bRet));

    return(bRet);
}


//-----------------------------------------------------------------------------
//
// Function: SL_SetParity
//
// This routine sets the parity of the device.
//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//      Parity 
//          [in] ULONG parity field from DCB.
//
// Returns:  
//      TRUE if success. FALSE if failure.
//
//-----------------------------------------------------------------------------
BOOL SL_SetParity( PVOID pContext, ULONG Parity )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;
    BOOL bRet = TRUE;
	
    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetParity+ 0x%X\r\n"),Parity));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
    
		//Disable RX & TX
        OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_RXEN) );
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_TXEN) );
			
	    switch (Parity) {
            
            case ODDPARITY:
              	INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_PREN, UART_UCR2_PREN_ENABLE);
                INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_PROE, UART_UCR2_PROE_ODD);

                break;
            case EVENPARITY:
                
				INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_PREN, UART_UCR2_PREN_ENABLE);      
				OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_PROE) );

                break;
            case MARKPARITY:
            case SPACEPARITY:
                bRet = FALSE;
                break;
            case NOPARITY:
                OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_PREN) );
				break;
            default:
                bRet = FALSE;
                break;
        }
        //Enable RX & TX
        		
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_RXEN, UART_UCR2_RXEN_ENABLE);
	    INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_TXEN, UART_UCR2_TXEN_ENABLE);
	}
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        bRet = FALSE;
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetParity- Ret = %d\r\n"), bRet));

    return(bRet);
}


//-----------------------------------------------------------------------------
//
// Function: SL_SetFlowControl
//
// This routine sets the flow control of the device.
//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//      FlowCtrl 
//          [in]  fOutxCtsFlow field from DCB.
//
// Returns:  
//      TRUE if success. FALSE if failure.
//
//-----------------------------------------------------------------------------
BOOL SL_SetFlowControl( PVOID pContext, BOOL FlowCtrl )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;
    BOOL bRet = TRUE;

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetFlowControl+ 0x%X\r\n"), FlowCtrl));

    EnterCriticalSection(&(pHWHead->RegCritSec));

    try {
        //Disable RX & TX
        OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_RXEN) );
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_TXEN) );

		if (FlowCtrl) {          
			OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_IRTS) );
			
			DEBUGMSG(ZONE_FUNCTION,(TEXT("Clear IRTS 0x%X\r\n"), pHWHead->pUartReg->UCR2));
        }
        else {
            INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_IRTS, UART_UCR2_IRTS_IGNORERTS);
            DEBUGMSG(ZONE_FUNCTION,(TEXT("Set IRTS 0x%X\r\n"), pHWHead->pUartReg->UCR2));
        }
        //Enable RX & TX
        
		INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_RXEN, UART_UCR2_RXEN_ENABLE);
        INSREG32BF(&pHWHead->pUartReg->UCR2, UART_UCR2_TXEN, UART_UCR2_TXEN_ENABLE);
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        bRet = FALSE;
    }

    LeaveCriticalSection(&(pHWHead->RegCritSec));

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_SetFlowControl- Ret = %d\r\n"), bRet));

    return(bRet);
}


//-----------------------------------------------------------------------------
//
// Function: SL_Reset
//
// This routine performs any operations associated
// with a device reset.
//
// Parameters:
//      pContext 
//          [in] Pointer to device head.
//
// Returns:  
//      None.
//
//-----------------------------------------------------------------------------
VOID SL_Reset( PVOID pContext )
{
    PUART_INFO pHWHead = (PUART_INFO)pContext;

    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_Reset+\r\n")));

    memset(&pHWHead->Status, 0, sizeof(COMSTAT));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
       OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_SRST) );


		// Wait until UART comes out of reset (reset asserted via UCR2 SRST)
		while (!(INREG32(&pHWHead->pUartReg->UCR2) & CSP_BITFMASK(UART_UCR2_SRST)));
		
		//Clear CTS
		OUTREG32( &pHWHead->pUartReg->UCR2, INREG32(&pHWHead->pUartReg->UCR2)&~CSP_BITFMASK(UART_UCR2_CTS) );

        //Set DTR DSR
        INSREG32BF(&pHWHead->pUartReg->UCR3, UART_UCR3_DSR, UART_UCR3_DSR_HIGH);
		
		if (pHWHead->UartType == DTE)
        {
        	OUTREG32( &pHWHead->pUartReg->UCR3, INREG32(&pHWHead->pUartReg->UCR3)&~CSP_BITFMASK(UART_UCR3_DCD) );
			OUTREG32( &pHWHead->pUartReg->UCR3, INREG32(&pHWHead->pUartReg->UCR3)&~CSP_BITFMASK(UART_UCR3_RI) );
					
		}
        else
        {
        	INSREG32BF(&pHWHead->pUartReg->UCR3, UART_UCR3_DCD, UART_UCR3_DCD_ENABLE);
		    INSREG32BF(&pHWHead->pUartReg->UCR3, UART_UCR3_RI, UART_UCR3_RI_ENABLE);
		}

        if (!pHWHead->UseIrDA) {
            	
			INSREG32BF(&pHWHead->pUartReg->UCR3, UART_UCR3_DTRDEN, UART_UCR3_DTRDEN_ENABLE);
		
        }
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
        EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));
    DEBUGMSG(ZONE_FUNCTION,(TEXT("SL_Reset-\r\n")));

    return;
}


//-----------------------------------------------------------------------------
//
// Function: SL_Init