mu.h

freescale i.mx31 BSP CE5.0全部源码

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//-----------------------------------------------------------------------------
//
//  Header:  mu.h
//
//  Provides public definitions for the Messaging Unit (MU) peripheral.
//
//-----------------------------------------------------------------------------
#include "mxarm11_mu.h"

#ifndef __MU_H__
#define __MU_H__

#if __cplusplus
extern "C" {
#endif

//-----------------------------------------------------------------------------
// Defines

// IOCTL values
#define MU_IOCTL_GET_MCR              0x0
#define MU_IOCTL_SET_MCR              0x1
#define MU_IOCTL_GET_MSR              0x2
#define MU_IOCTL_GPI                  0x3
#define MU_IOCTL_SIDE_RESET           0x4
#define MU_IOCTL_SYSTEM_RESET         0x5
#define MU_IOCTL_DSP_RESET_ON         0x6
#define MU_IOCTL_DSP_RESET_OFF        0x7
#define MU_IOCTL_WAIT_FOR_RESET       0x8
#define MU_IOCTL_ENABLE_INTERRUPTS    0x9
#define MU_IOCTL_DISABLE_INTERRUPTS   0xA

#define  MU_TRANSMIT_0_EMPTY_EVENT   L"TX0 Interrupt"
#define  MU_TRANSMIT_1_EMPTY_EVENT   L"TX1 Interrupt"
#define  MU_TRANSMIT_2_EMPTY_EVENT   L"TX2 Interrupt"
#define  MU_TRANSMIT_3_EMPTY_EVENT   L"TX3 Interrupt"
#define  MU_RECEIVE_0_FULL_EVENT     L"RX0 Interrupt"
#define  MU_RECEIVE_1_FULL_EVENT     L"RX1 Interrupt"
#define  MU_RECEIVE_2_FULL_EVENT     L"RX2 Interrupt"
#define  MU_RECEIVE_3_FULL_EVENT     L"RX3 Interrupt"
#define  MU_GPI3_EVENT               L"GPI3 Interrupt"
#define  MU_GPI2_EVENT               L"GPI2 Interrupt"
#define  MU_GPI1_EVENT               L"GPI1 Interrupt"
#define  MU_GPI0_EVENT               L"GPI0 Interrupt"
 
//-----------------------------------------------------------------------------
// Types

typedef enum MUIntrType
{
    MUIntrType_Receive0Full = 0,
    MUIntrType_Receive1Full,
    MUIntrType_Receive2Full,
    MUIntrType_Receive3Full,
    MUIntrType_Transmit0Empty,
    MUIntrType_Transmit1Empty,
    MUIntrType_Transmit2Empty,
    MUIntrType_Transmit3Empty,
    MUIntrType_GPI0,
    MUIntrType_GPI1,
    MUIntrType_GPI2,
    MUIntrType_GPI3,
} MUIntrType_c;


typedef enum MUCtrlRegField
{
    MUCtrlRegField_MDF0 = 1 << MU_MCR_MDF0_LSH,
    MUCtrlRegField_MDF1 = 1 << MU_MCR_MDF1_LSH,
    MUCtrlRegField_MDF2 = 1 << MU_MCR_MDF2_LSH,
    MUCtrlRegField_DNMI = 1 << MU_MCR_DNMI_LSH,
    MUCtrlRegField_DHR = 1 << MU_MCR_DHR_LSH,
    MUCtrlRegField_MMUR = 1 << MU_MCR_MMUR_LSH,
    MUCtrlRegField_DRDIE = 1 << MU_MCR_DRDIE_LSH,
    MUCtrlRegField_MGIR3 = 1 << MU_MCR_MGIR3_LSH,
    MUCtrlRegField_MGIR2 = 1 << MU_MCR_MGIR2_LSH,
    MUCtrlRegField_MGIR1 = 1 << MU_MCR_MGIR1_LSH,
    MUCtrlRegField_MGIR0 = 1 << MU_MCR_MGIR0_LSH,
    MUCtrlRegField_MTIE3 = 1 << MU_MCR_MTIE3_LSH,
    MUCtrlRegField_MTIE2 = 1 << MU_MCR_MTIE2_LSH,
    MUCtrlRegField_MTIE1 = 1 << MU_MCR_MTIE1_LSH,
    MUCtrlRegField_MTIE0 = 1 << MU_MCR_MTIE0_LSH,
    MUCtrlRegField_MRIE3 = 1 << MU_MCR_MRIE3_LSH,
    MUCtrlRegField_MRIE2 = 1 << MU_MCR_MRIE2_LSH,
    MUCtrlRegField_MRIE1 = 1 << MU_MCR_MRIE1_LSH,
    MUCtrlRegField_MRIE0 = 1 << MU_MCR_MRIE0_LSH,
    MUCtrlRegField_MGIE3 = 1 << MU_MCR_MGIE3_LSH,
    MUCtrlRegField_MGIE2 = 1 << MU_MCR_MGIE2_LSH,
    MUCtrlRegField_MGIE1 = 1 << MU_MCR_MGIE1_LSH,
    MUCtrlRegField_MGIE0 = 1 << MU_MCR_MGIE0_LSH,
} MUCtrlRegField_c;

typedef enum MUStatusRegField
{
    MUStatusRegField_MF0 = 1 << MU_MSR_MF0_LSH,
    MUStatusRegField_MF1 = 1 << MU_MSR_MF1_LSH,
    MUStatusRegField_MF2 = 1 << MU_MSR_MF2_LSH,
    MUStatusRegField_MNMIC = 1 << MU_MSR_MNMIC_LSH,
    MUStatusRegField_MEP = 1 << MU_MSR_MEP_LSH,
    MUStatusRegField_DPM0 = 1 << MU_MSR_DPM_LSH,
    MUStatusRegField_DPM1 = 1 << (MU_MSR_DPM_LSH + 1),
    MUStatusRegField_DRS = 1 << MU_MSR_DRS_LSH,
    MUStatusRegField_MFUP = 1 << MU_MSR_MFUP_LSH,
    MUStatusRegField_DRDIP = 1 << MU_MSR_DRDIP_LSH,
    MUStatusRegField_MTE3 = 1 << MU_MSR_MTE3_LSH,
    MUStatusRegField_MTE2 = 1 << MU_MSR_MTE2_LSH,
    MUStatusRegField_MTE1 = 1 << MU_MSR_MTE1_LSH,
    MUStatusRegField_MTE0 = 1 << MU_MSR_MTE0_LSH,
    MUStatusRegField_MRF3 = 1 << MU_MSR_MRF3_LSH,
    MUStatusRegField_MRF2 = 1 << MU_MSR_MRF2_LSH,
    MUStatusRegField_MRF1 = 1 << MU_MSR_MRF1_LSH,
    MUStatusRegField_MRF0 = 1 << MU_MSR_MRF0_LSH,
    MUStatusRegField_MGIP3 = 1 << MU_MSR_MGIP3_LSH,
    MUStatusRegField_MGIP2 = 1 << MU_MSR_MGIP2_LSH,
    MUStatusRegField_MGIP1 = 1 << MU_MSR_MGIP1_LSH,
    MUStatusRegField_MGIP0 = 1 << MU_MSR_MGIP0_LSH,
} MUStatusRegField_c;


//-----------------------------------------------------------------------------
// Functions

HANDLE MUOpenMU(void);
BOOL MUCloseMU(HANDLE);
void MUGetControl(HANDLE, DWORD *);
void MUSetControl(HANDLE, DWORD);
void MUGetStatus(HANDLE, DWORD *);
BOOL MUWriteData(HANDLE, UINT16, UINT8 *);
BOOL MUReadData(HANDLE, UINT16, UINT8 *);
void MUGPI(HANDLE, UINT8);
void MUSideReset(HANDLE);
void MUSystemReset(HANDLE);
void MUDSPResetON(HANDLE);
void MUDSPResetOFF(HANDLE);
void MUWait4Reset(HANDLE);
DWORD MUEnableInterrupts(HANDLE, MUIntrType_c);
DWORD MUDisableInterrupts(HANDLE, MUIntrType_c);

#ifdef __cplusplus
}
#endif

#endif // __MU_H__