ddk_sdma.c

freescale i.mx31 BSP CE5.0全部源码

    case DDK_DMA_REQ_UART1_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART1_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART1 + UART_UTXD_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_SDHC1_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SDHC1_MSHC1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SDHC1 + SDHC_BUFFER_ACCESS_OFFSET;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SDHC1_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SDHC1_MSHC1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SDHC1 + SDHC_BUFFER_ACCESS_OFFSET;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SDHC2_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SDHC2_MSHC2;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SDHC2 + SDHC_BUFFER_ACCESS_OFFSET;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SDHC2_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SDHC2_MSHC2;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SDHC2 + SDHC_BUFFER_ACCESS_OFFSET;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI2_RX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI2_RX1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI2 + SSI_SRX1_OFFSET;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI2_TX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI2_TX1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI2 + SSI_STX1_OFFSET;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI2_RX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI2_RX0;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI2 + SSI_SRX0_OFFSET;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI2_TX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI2_TX0;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI2 + SSI_STX0_OFFSET;
        if (BSPSdmaUsePerDma(dmaReq))
        {
            pChanDesc->scriptAddr = per_2_shp_ADDR;
        }
        else
        {
            pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        }
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI1_RX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI1_RX1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI1 + SSI_SRX1_OFFSET;
        pChanDesc->scriptAddr = app_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI1_TX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI1_TX1;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI1 + SSI_STX1_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI1_RX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI1_RX0;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI1 + SSI_SRX0_OFFSET;
        pChanDesc->scriptAddr = app_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SSI1_TX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SSI1_TX0;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SSI1 + SSI_STX0_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_NFC:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_NANDFC;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;
        
    case DDK_DMA_REQ_ECT:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_ECT;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;

    case DDK_DMA_REQ_MEM2MEM:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_NONE;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;

    default:
        rc = FALSE;
        break;
        
    }

    return rc;
}


//-----------------------------------------------------------------------------
//
//  Function:  SdmaUpdateChanDesc
//
//  This function updates the descriptor for a channel with a shared DMA event
//  so that one of the alternate DMA requests becomes active.
//
//  Parameters:
//      dmaReq
//          [in] - Specifies one of the possible DMA requests valid for
//                 a channel with a shared DMA event.  The DMA request
//                 must be one of the set of requests valid for the existing
//                 channel descriptor.
//
//  Returns:  
//      Returns TRUE if successful, otherwise returns FALSE.
//
//-----------------------------------------------------------------------------
BOOL SdmaUpdateChanDesc(DDK_DMA_REQ dmaReq, PSDMA_CHAN_DESC pChanDesc)
{
    BOOL rc = FALSE;
    
    switch(dmaReq)
    {

    case DDK_DMA_REQ_SDHC1_RX:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SDHC1_MSHC1))
        {
            pChanDesc->scriptAddr = shp_2_mcu_ADDR;
            rc = TRUE;
        }
        break;
        
    case DDK_DMA_REQ_SDHC1_TX:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U <<  DMA_EVENT_SDHC1_MSHC1))
        {
            pChanDesc->scriptAddr = mcu_2_shp_ADDR;
            rc = TRUE;
        }
        break;
        
    case DDK_DMA_REQ_SDHC2_RX:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SDHC2_MSHC2))
        {
            pChanDesc->scriptAddr = shp_2_mcu_ADDR;
            rc = TRUE;
        }
        break;
        
    case DDK_DMA_REQ_SDHC2_TX:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SDHC2_MSHC2))
        {
            pChanDesc->scriptAddr = mcu_2_shp_ADDR;
            rc = TRUE;
        }
        break;

    case DDK_DMA_REQ_SIM1_RX0:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SIM))
        {
            pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x1A;
            pChanDesc->scriptAddr = shp_2_mcu_ADDR;
            rc = TRUE;
        }
        break;

    case DDK_DMA_REQ_SIM1_TX0:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SIM))
        {
            pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x1C;
            pChanDesc->scriptAddr = mcu_2_shp_ADDR;
            rc = TRUE;
        }
        break;

    case DDK_DMA_REQ_SIM1_RX1:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SIM))
        {
            pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x08;
            pChanDesc->scriptAddr = shp_2_mcu_ADDR;
            rc = TRUE;
        }
        break;

    case DDK_DMA_REQ_SIM1_TX1:
        // Check to make sure DMA request belongs to shared DMA event
        if (pChanDesc->dmaMask & (1U << DMA_EVENT_SIM))
        {
            pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x06;
            pChanDesc->scriptAddr = mcu_2_shp_ADDR;
            rc = TRUE;
        }
        break;
    }

    return rc;
}




//-----------------------------------------------------------------------------
//
//  Function:  SdmaSetChanContext
//
//  This function configures the parameters passed to the SDMA via
//  the channel context.
//
//  Parameters:
//
//  Returns:  
//      Returns TRUE if successful, otherwise returns FALSE.
//
//-----------------------------------------------------------------------------
BOOL SdmaSetChanContext(UINT8 chan, PSDMA_CHAN_DESC pChanDesc, UINT8 waterMark, 
    PSDMA_CHANNEL_CONTEXT pChanCtxt)
{
    // Zero out the context
    memset(pChanCtxt, 0, sizeof(SDMA_CHANNEL_CONTEXT));

    switch(pChanDesc->scriptAddr)
    {

#ifdef SDMA_ROM_V2
    case ap_2_ap_ADDR:
        // GR7 = ARM M3 (external memory) start address
        pChanCtxt->GR[7] = CSP_BASE_MEM_PA_CSD0;
        break;
#else
    case mcu_2_mcu_ADDR:
        // GR7 = scratch area base
        pChanCtxt->GR[7] = SDMA_DM_SCATCH_START +(SDMA_DM_SCRATCH_WORDS*chan);
        break;
#endif

    case ata_2_mcu_ADDR:
    case mcu_2_ata_ADDR:
        // GR0 = ATA alarm event mask
        // GR1 = ATA transfer end alarm event mask
        // GR6 = peripheral address
        // GR7 = watermark level
        pChanCtxt->GR[0] = pChanDesc->dmaMask & (~(1U << DMA_EVENT_ATA_TXEND));
        pChanCtxt->GR[1] = (1U << (DMA_EVENT_ATA_TXEND));
        pChanCtxt->GR[6] = pChanDesc->perAddr;
        pChanCtxt->GR[7] = waterMark;
        break;
        
    default:
        // GR1 = event mask
        // GR6 = peripheral address
        // GR7 = watermark level
        pChanCtxt->GR[1] = pChanDesc->dmaMask;
        pChanCtxt->GR[6] = pChanDesc->perAddr;
        pChanCtxt->GR[7] = waterMark;
        break;
        
    }

    // PC_RPC = script address
    pChanCtxt->PC_RPC = pChanDesc->scriptAddr;
    
    return TRUE;
}