ddk_sdma.c

freescale i.mx31 BSP CE5.0全部源码

//-----------------------------------------------------------------------------
//
//  Copyright (C) 2006, Freescale Semiconductor, Inc. All Rights Reserved
//  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
//  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
//  FREESCALE SEMICONDUCTOR, INC.
//
//-----------------------------------------------------------------------------
//
//  File:  ddk_sdma.c
//
//  This file contains the SoC-specific DDK interface for the SDMA module.
//
//-----------------------------------------------------------------------------
#include <windows.h>
#include <nkintr.h>
#include <ceddk.h>
#include "csp.h"

#define SDMA_ROM_V2

#ifdef SDMA_ROM_V2
#include "sdma_script_code_v2.h"
#define SDMA_EXT_BD                 TRUE
#define SDMA_MEM2MEM_SCRIPT         ap_2_ap_ADDR
#else
#include "sdma_script_code.h"
#define SDMA_EXT_BD                 FALSE
#define SDMA_MEM2MEM_SCRIPT         mcu_2_mcu_ADDR
#endif


//-----------------------------------------------------------------------------
// External Functions
extern BOOL BSPSdmaUsePerDma(DDK_DMA_REQ dmaReq);

//-----------------------------------------------------------------------------
// External Variables 


//-----------------------------------------------------------------------------
// Defines 

// 8-word scratch area is required for each channel using mcu_2_mcu script
#define SDMA_DM_SCRATCH_WORDS       8
#define SDMA_DM_SCRATCH_SIZE        (SDMA_NUM_CHANNELS*SDMA_DM_SCRATCH_WORDS)
#define SDMA_DM_RAM_END             (SDMA_DM_RAM_START + (SDMA_RAM_SIZE/4))
#define SDMA_DM_SCATCH_START        (SDMA_DM_RAM_END - SDMA_DM_SCRATCH_SIZE)

//-----------------------------------------------------------------------------
// Types


//-----------------------------------------------------------------------------
// Global Variables


//-----------------------------------------------------------------------------
// Local Variables


//-----------------------------------------------------------------------------
// Local Functions


//-----------------------------------------------------------------------------
//
//  Function:  SdmaLoadRamScripts
//
//  This function loads the SDMA RAM script image into the specified buffer.
//
//  Parameters:
//      pBuf
//          [out] - Points to buffer that will be filled with SDMA RAM 
//          contents.
//
//  Returns:  
//      Returns the size in bytes of the SDMA RAM image.
//
//-----------------------------------------------------------------------------
UINT16 SdmaLoadRamScripts(void *pBuf)
{   
    memcpy(pBuf, &sdma_code, RAM_CODE_SIZE<<1);
    return RAM_CODE_SIZE<<1;
}


//-----------------------------------------------------------------------------
//
//  Function:  SdmaSetChanDesc
//
//  This function fills the fields of the channel descriptor structure
//  based on the DMA request line specified.
//
//  Parameters:
//      dmaReq
//          [in] Specifies the DMA request line.
//
//      pChanDesc
//          [out] Points to channel descriptor structure to be updated.
//
//  Returns:  
//      Returns TRUE if successful, otherwise returns FALSE.
//
//-----------------------------------------------------------------------------
BOOL SdmaSetChanDesc(DDK_DMA_REQ dmaReq, PSDMA_CHAN_DESC pChanDesc)
{   
    BOOL rc = TRUE;
    
    switch(dmaReq)
    {

    case DDK_DMA_REQ_EXT0:
        pChanDesc->dmaMask = 1U << DMA_EVENT_EXTREQ0;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;
        
    case DDK_DMA_REQ_CCM:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CCM;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CCM;
        pChanDesc->scriptAddr = dptc_dvfs_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_ATA_TX:
        pChanDesc->dmaMask = (1U <<  DMA_EVENT_ATA_TX) | (1U <<  DMA_EVENT_ATA_TXEND);
        // pChanDesc->perAddr = CSP_BASE_REG_PA_ATA_CTRL;
        pChanDesc->perAddr = 0x50020018; // ATA FIFO32 address in a way that SDMA will change it to the correct address
        pChanDesc->scriptAddr = mcu_2_ata_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_ATA_RX:
        pChanDesc->dmaMask = (1U <<  DMA_EVENT_ATA_RX) | (1U <<  DMA_EVENT_ATA_TXEND);
        // pChanDesc->dmaMask = (1U <<  DMA_EVENT_ATA_RX);
        // pChanDesc->perAddr = CSP_BASE_REG_PA_ATA_CTRL;
        pChanDesc->perAddr = 0x50020000; // ATA BASE address in a way that SDMA will change it to the correct address
        pChanDesc->scriptAddr = ata_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;
        
    case DDK_DMA_REQ_SIM1_RX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SIM;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x1A;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_SIM1_TX0:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SIM;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x1C;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_SIM1_RX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SIM;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x08;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_SIM1_TX1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_SIM;
        pChanDesc->perAddr = CSP_BASE_REG_PA_SIM + 0x06;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI2_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI2_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI2 + CSPI_RXDATA_OFFSET;
        pChanDesc->scriptAddr = shp_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI2_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI2_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI2 + CSPI_TXDATA_OFFSET;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI1_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI1_UART3_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI1 + CSPI_RXDATA_OFFSET;
        pChanDesc->scriptAddr = app_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI1_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI1_UART3_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI1 + CSPI_TXDATA_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART3_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI1_UART3_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART3 + UART_URXD_OFFSET;
        pChanDesc->scriptAddr = uartsh_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART3_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI1_UART3_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART3 + UART_UTXD_OFFSET;
        pChanDesc->scriptAddr = mcu_2_shp_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI3_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI3_UART5_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI3 + CSPI_RXDATA_OFFSET;
        pChanDesc->scriptAddr = app_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_CSPI3_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI3_UART5_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_CSPI3 + CSPI_TXDATA_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART5_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI3_UART5_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART5 + UART_URXD_OFFSET;
        pChanDesc->scriptAddr = uart_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART5_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_CSPI3_UART5_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART5 + UART_UTXD_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART4_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART4_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART4 + UART_URXD_OFFSET;
        pChanDesc->scriptAddr = uart_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART4_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART4_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART4 + UART_UTXD_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_EXT2:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_EXTREQ2;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;

    case DDK_DMA_REQ_EXT1:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_EXTREQ1;
        pChanDesc->perAddr = 0;
        pChanDesc->scriptAddr = SDMA_MEM2MEM_SCRIPT;
        pChanDesc->bExtended = TRUE;
        break;

    case DDK_DMA_REQ_UART2_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART2_FIRI_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART2 + UART_URXD_OFFSET;
        pChanDesc->scriptAddr = uart_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART2_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART2_FIRI_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART2 + UART_UTXD_OFFSET;
        pChanDesc->scriptAddr = mcu_2_app_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_FIRI_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART2_FIRI_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_FIRI;
        pChanDesc->scriptAddr = firi_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_FIRI_TX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART2_FIRI_TX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_FIRI;
        pChanDesc->scriptAddr = mcu_2_firi_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;

    case DDK_DMA_REQ_UART1_RX:
        pChanDesc->dmaMask = 1U <<  DMA_EVENT_UART1_RX;
        pChanDesc->perAddr = CSP_BASE_REG_PA_UART1 + UART_URXD_OFFSET;
        pChanDesc->scriptAddr = uart_2_mcu_ADDR;
        pChanDesc->bExtended = SDMA_EXT_BD;
        break;