bspdisplay.cpp

freescale i.mx31 BSP CE5.0全部源码

//------------------------------------------------------------------------------
//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2004, Motorola Inc. All Rights Reserved
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2006, Freescale Semiconductor, Inc. All Rights Reserved
//  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
//  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
//  Freescale Semiconductor, Inc.
//
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
//
//  File:  bspdisplay.cpp
//
//  Provides BSP-specific configuration routines for the Display driver.
//  Includes initialization routine for the TV out encoder chip.
//
//------------------------------------------------------------------------------
#include <windows.h>
#include <winuser.h>
#include <winuserm.h>
#include <ceddk.h>

#include "bsp.h"
#include "fs453.h"
#include "precomp.h"

//------------------------------------------------------------------------------
// External Functions


//------------------------------------------------------------------------------
// External Variables


//------------------------------------------------------------------------------
// Defines
#define LCD_CSPI2_CONFIG 0x000617F3
#define LCD_CSPI2_FUNCTION_OFF 0
#define LCD_RESET_GPIO_PIN 21
#define LCD_SD_GPIO_PIN 20
#define LCD_PWEN_GPIO_PIN 25

//------------------------------------------------------------------------------
// Types


//------------------------------------------------------------------------------
// Global Variables


//------------------------------------------------------------------------------
// Local Variables
static PCSP_PBC_REGS g_pPBC = NULL;
static PCSP_CSPI_REG g_pCSPI2 = NULL;
static HANDLE g_hCspi2Mutex;

//------------------------------------------------------------------------------
// Local Functions
static void LCD_CSPI_Write(UINT32 data);
static void DisplayOn(void);
static void DisplayOff(void);


//------------------------------------------------------------------------------
//
// Function: LCD_CSPI_Write
//
// This function perform the CSPI write operation.
//
// Parameters:
//      data
//          [in] input data which should be written to LCD thru CSPI.
//
// Returns:
//      None
//
//------------------------------------------------------------------------------
static void LCD_CSPI_Write(UINT32 data)
{
	UINT32 uCount=0xffff;
    OUTREG32(&g_pCSPI2->TXDATA, data);
	INSREG32BF(&g_pCSPI2->CONREG, CSPI_CONREG_XCH, CSPI_CONREG_XCH_EN);

    // Polling loop.
	do
	{
	    uCount--;
	}while((INREG32(&g_pCSPI2->CONREG) & CSP_BITFMASK(CSPI_CONREG_XCH)) && uCount);

	if(!uCount)
	{
		DEBUGMSG(GPE_ZONE_ERROR, (TEXT("LCD_CSPI Transfer failed! Time Out!!!\r\n")));
	}
}

//------------------------------------------------------------------------------
//
// Function: DisplayOn
//
// This function enables the CSPI channel and perform the LCD power on sequence.
//
// Parameters:
//      None
//
// Returns:
//      None
//
//------------------------------------------------------------------------------
static void DisplayOn(void)
{

  //Enable LCD Power
  DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_PWEN_GPIO_PIN, 0);

	//Reset LCD module
	DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_RESET_GPIO_PIN, 0);
	Sleep(10);
	DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_RESET_GPIO_PIN, 1);

    WaitForSingleObject(g_hCspi2Mutex, INFINITE);
	
	DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_CSPI2, DDK_CLOCK_GATE_MODE_ENABLED_ALL);

	//Config CSPI2 registers 
	OUTREG32(&g_pCSPI2->CONREG, LCD_CSPI2_CONFIG);
	OUTREG32(&g_pCSPI2->DMAREG, LCD_CSPI2_FUNCTION_OFF);
	OUTREG32(&g_pCSPI2->INTREG, LCD_CSPI2_FUNCTION_OFF);
	OUTREG32(&g_pCSPI2->TESTREG, LCD_CSPI2_FUNCTION_OFF);

	//Enable CSPI2
	INSREG32BF(&g_pCSPI2->CONREG, CSPI_CONREG_EN, CSPI_CONREG_EN_ENABLE);

	//LCD Power ON sequence
	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00760000);

	Sleep(10);
	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00764000);

	LCD_CSPI_Write(0x0074000A);
	LCD_CSPI_Write(0x00762000);

	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00764055);

	Sleep(50);
	LCD_CSPI_Write(0x00740001);
	LCD_CSPI_Write(0x0076409D);
	
	LCD_CSPI_Write(0x00740002);
	LCD_CSPI_Write(0x00760204);

	LCD_CSPI_Write(0x00740003);
	LCD_CSPI_Write(0x00760100);

	LCD_CSPI_Write(0x00740004);
	LCD_CSPI_Write(0x00763000);

	LCD_CSPI_Write(0x00740005);
	LCD_CSPI_Write(0x00764003);

	LCD_CSPI_Write(0x00740006);
	LCD_CSPI_Write(0x0076000A);

	LCD_CSPI_Write(0x00740007);
	LCD_CSPI_Write(0x00760021);

	LCD_CSPI_Write(0x00740008);
	LCD_CSPI_Write(0x00760C00);

	LCD_CSPI_Write(0x00740010);
	LCD_CSPI_Write(0x00760103);

	LCD_CSPI_Write(0x00740011);
	LCD_CSPI_Write(0x00760301);

	LCD_CSPI_Write(0x00740012);
	LCD_CSPI_Write(0x00761F0F);

	LCD_CSPI_Write(0x00740013);
	LCD_CSPI_Write(0x00761F0F);
	
	LCD_CSPI_Write(0x00740014);
	LCD_CSPI_Write(0x00760707);

	LCD_CSPI_Write(0x00740015);
	LCD_CSPI_Write(0x00760307);

	LCD_CSPI_Write(0x00740016);
	LCD_CSPI_Write(0x00760707);

	LCD_CSPI_Write(0x00740017);
	LCD_CSPI_Write(0x00760000);

	LCD_CSPI_Write(0x00740018);
	LCD_CSPI_Write(0x00760004);

	LCD_CSPI_Write(0x00740019);
	LCD_CSPI_Write(0x00760000);

	Sleep(100);
	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00764A55);

	LCD_CSPI_Write(0x00740005);
	LCD_CSPI_Write(0x00765003);

    //Disable CSPI2
	INSREG32BF(&g_pCSPI2->CONREG, CSPI_CONREG_EN, CSPI_CONREG_EN_DISABLE);

	DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_CSPI2, DDK_CLOCK_GATE_MODE_DISABLED);

	ReleaseMutex(g_hCspi2Mutex);

}

//------------------------------------------------------------------------------
//
// Function: DisplayOff
//
// This function enables the CSPI channel and perform the LCD power off sequence.
//
// Parameters:
//      None
//
// Returns:
//      None
//
//------------------------------------------------------------------------------
static void DisplayOff(void)
{
    WaitForSingleObject(g_hCspi2Mutex, INFINITE);
	
  //Disable LCD Power
  DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_PWEN_GPIO_PIN, 1);

	DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_CSPI2, DDK_CLOCK_GATE_MODE_ENABLED_ALL);

	//Config CSPI2 registers 
	OUTREG32(&g_pCSPI2->CONREG, LCD_CSPI2_CONFIG);
	OUTREG32(&g_pCSPI2->DMAREG, LCD_CSPI2_FUNCTION_OFF);
	OUTREG32(&g_pCSPI2->INTREG, LCD_CSPI2_FUNCTION_OFF);
	OUTREG32(&g_pCSPI2->TESTREG, LCD_CSPI2_FUNCTION_OFF);

	//Enable CSPI2
	INSREG32BF(&g_pCSPI2->CONREG, CSPI_CONREG_EN, CSPI_CONREG_EN_ENABLE);

	//LCD Power OFF sequence
	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00764055);

	LCD_CSPI_Write(0x00740005);
	LCD_CSPI_Write(0x00764003);

	LCD_CSPI_Write(0x0074000A);
	LCD_CSPI_Write(0x00760000);

	Sleep(2);
	LCD_CSPI_Write(0x00740009);
	LCD_CSPI_Write(0x00764000);

    //Disable CSPI2
	INSREG32BF(&g_pCSPI2->CONREG, CSPI_CONREG_EN, CSPI_CONREG_EN_DISABLE);

	DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_CSPI2, DDK_CLOCK_GATE_MODE_DISABLED);

	ReleaseMutex(g_hCspi2Mutex);
}

//------------------------------------------------------------------------------
//
// Function: BSPInitializeLCD
//
// This function maps the PBC pointer that is needed later
// when enabling and disabling the LCD.
//
// Parameters:
//      None
//
// Returns:
//      TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------
BOOL BSPInitializeLCD()
{
    PHYSICAL_ADDRESS phyAddr;

    if (g_pPBC == NULL)
    {
        phyAddr.QuadPart = BSP_BASE_REG_PA_PBC_BASE;

        // Map PBC registers to virtual address space
        g_pPBC = (PCSP_PBC_REGS) MmMapIoSpace(phyAddr, sizeof(CSP_PBC_REGS), FALSE);
        if (g_pPBC == NULL)
        {
            DEBUGMSG(GPE_ZONE_ERROR, (TEXT("%s(): MmMapIoSpace failed!\r\n"), __WFUNCTION__));
            return FALSE;
        }
    }

    if (g_pCSPI2 == NULL)
    {
        //Init related pins
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_SD_D_IO, DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO);
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_SD_D_I, DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO);
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI2_SCLK, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI2_SS0, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI2_MISO, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
        DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI2_MOSI, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
        DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SD_D_IO, DDK_IOMUX_PAD_SLEW_SLOW, DDK_IOMUX_PAD_DRIVE_NORMAL, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_SCHMITT, DDK_IOMUX_PAD_PULL_UP_100K);
        DDKGpioSetConfig(DDK_GPIO_PORT3, LCD_RESET_GPIO_PIN, DDK_GPIO_DIR_OUT, DDK_GPIO_INTR_NONE);
        DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SD_D_I, DDK_IOMUX_PAD_SLEW_SLOW, DDK_IOMUX_PAD_DRIVE_NORMAL, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_SCHMITT, DDK_IOMUX_PAD_PULL_UP_100K);
        DDKGpioSetConfig(DDK_GPIO_PORT3, LCD_SD_GPIO_PIN, DDK_GPIO_DIR_OUT, DDK_GPIO_INTR_NONE);
		     //Enable Backlight
    	  DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_SD_GPIO_PIN, 1);
    	  DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_RESET_GPIO_PIN, 1);

       DDKIomuxSetPinMux(DDK_IOMUX_PIN_SER_RS, DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO);
       DDKGpioSetConfig(DDK_GPIO_PORT3, LCD_PWEN_GPIO_PIN, DDK_GPIO_DIR_OUT, DDK_GPIO_INTR_NONE);
       //Enable LCD Power
       DDKGpioWriteDataPin(DDK_GPIO_PORT3, LCD_PWEN_GPIO_PIN, 0);

        phyAddr.QuadPart = CSP_BASE_REG_PA_CSPI2;

        // Map PBC registers to virtual address space
        g_pCSPI2 = (PCSP_CSPI_REG) MmMapIoSpace(phyAddr, sizeof(PCSP_CSPI_REG), FALSE);
        if (g_pCSPI2 == NULL)
        {
            DEBUGMSG(GPE_ZONE_ERROR, (TEXT("%s(): MmMapIoSpace failed!\r\n"), __WFUNCTION__));
            return FALSE;
        }

        g_hCspi2Mutex = CreateMutex(NULL, FALSE, L"MUTEX_PMIC");

    }

    return TRUE;
}

//------------------------------------------------------------------------------
//
// Function: BSPEnableLCD
//
// This function enables the Sharp display panel by turning on the
// LCD through the Peripheral Bus Controller.
//
// Parameters:
//      None
//
// Returns:
//      TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------
BOOL BSPEnableLCD()
{
    if (g_pPBC == NULL || g_pCSPI2 == NULL)
    {
        return FALSE;
    }

    DisplayOn();

    // Turn on LCD via PBC
    OUTREG16(&g_pPBC->BCTRL1_SET, CSP_BITFMASK(PBC_BCTRL1_SET_LCDON));

    return TRUE;
}

//------------------------------------------------------------------------------
//
// Function: BSPDisableLCD
//
// This function disables the Sharp display panel by turning on the
// LCD through the Peripheral Bus Controller.
//
// Parameters:
//      None
//
// Returns:
//      TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------
BOOL BSPDisableLCD()
{
    if (g_pPBC == NULL)
    {
        return FALSE;
    }

    // Turn off LCD via PBC
    OUTREG16(&g_pPBC->BCTRL1_CLEAR, CSP_BITFMASK(PBC_BCTRL1_CLEAR_LCDON));

	DisplayOff();

    return TRUE;
}


//------------------------------------------------------------------------------
//
// Function: BSPInitializeTVOut
//
// This function initializes the FS453 TV out encoder.
//
// Parameters:
//      None
//
// Returns:
//      TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------
BOOL BSPInitializeTVOut(BOOL tvout_ntsc)
{
    BOOL retVal = TRUE;

    if (!Fs453Init())
    {
        retVal = FALSE;
        goto done;
    }

	if (!Fs453Configure(TVIN_COLOR_RGB, (tvout_ntsc == TRUE) ? TVOUT_MODE_NTSC : TVOUT_MODE_PAL ))
    {
        retVal = FALSE;
        goto done;
    }

    if (!Fs453DACOn(TVOUT_DAC_ALL))
    {
        retVal = FALSE;
        goto done;
    }

done:
    return retVal;
}


//------------------------------------------------------------------------------
//
// Function: BSPDeinitializeTVOut
//
// This function deinitializes the FS453 TV out encoder.
//
// Parameters:
//      None
//
// Returns:
//      TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------
BOOL BSPDeinitializeTVOut()
{
    BOOL retVal = TRUE;

    if (!Fs453Deinit())
    {
        retVal = FALSE;
        goto done;
    }

    if (!Fs453DACOff(TVOUT_DAC_ALL))
    {
        retVal = FALSE;
        goto done;
    }

done:
    return retVal;
}