hwinit.c

freescale i.mx31 BSP CE5.0全部源码

/*------------------------------------------------------------------------------
 * Copyright (C) 2005-2006, Freescale Semiconductor, Inc. All Rights Reserved.
 * THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
 * BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
 * Freescale Semiconductor, Inc.
 *----------------------------------------------------------------------------*/ 
/*
 *  File:     hwinit.c
 *  Purpose:  Platform-specific host driver initialisation and configuration
 *            Pin muxing
 *            CPLD configuration
 *            transceiver, wakeup, Vbus configuration
 *
 *  Functions:  BSPUsbhCheckConfigPower  - verify power available for devices
 *              BSPUsbSetWakeUp          - setup wakeup sources for host port
 *              InitializeTransceiver    - any setup required for attached transceiver   
 *              SetPHYPowerMgmt          - suspend or resume the transceiver
 */
#include <windows.h>
#include <Winbase.h>
#include <ceddk.h>
#include "bsp.h"
#include "mx31_usb.h"
#include "mx31_usbname.h"
#include "mx31_usbcommon.h"

// ISP1105: Full Speed Host 1
// ISP1504: High Speed OTG
// ISP1301: Full Speed OTG
// ISP1504: High Speed Host 2
#define HIGH_SPEED      1
#define FULL_SPEED      2

PCSP_USB_REGS gRegs; 
WORD gSel;
void SetULPIHostMode(PCSP_USB_REGS pRegs, WORD pSel, BOOL fSuspend);

volatile UINT32 *gQueueHead;
#define QUEUE_HEAD_SIZE 0x200

// Really needs this
TCHAR gszOTGGroup[30];
DWORD gdwOTGSupport;
BOOL BSPUsbCheckWakeUp(void);

//-----------------------------------------------------------------------------
//
//  Function: SetPHYPowerMgmt
//
//  This function is to configure the ULPI to suspend or resume mode.
//
//  Parameters:
//     fSuspend - TRUE : Suspend request, FALSE : Resume request
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
void SetPHYPowerMgmt(BOOL fSuspend)
{
    //RETAILMSG(1, (TEXT("+SetPHYPowerMgmt\r\n")));
    // 2 is OTG while 0 is H2
    if ((gSel != 2) && (gSel != 0))
        return;

    
    SetULPIHostMode(gRegs, gSel, fSuspend);
    //RETAILMSG(1, (TEXT("-SetPHYPowerMgmt\r\n")));
    return;
}

//-----------------------------------------------------------------------------
//
//  Function: InitializeOTGMux
//
//  This function is to configure the IOMUX for USB OTG Core
//
//  Parameters:
//     NULL
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void InitializeOTGMux()
{

    //RETAILMSG(1, (TEXT("Configure OTG Host\r\n")));
    //usb_otg_iomux_connection();
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA7, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA6, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA5, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA4, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA3, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA2, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DATA0, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_NXT, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_STP, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_DIR, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBOTG_CLK, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USB_PWR, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);

    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA0, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA1, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA2, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA3, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA4, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA5, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA6, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DATA7, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_STP, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
// Not sure for last 3
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_NXT, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_DIR, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBOTG_CLK, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_NONE);

    //RETAILMSG(1, (TEXT("- InitializeOTGMux okay\r\n")));
    return;
}

//-----------------------------------------------------------------------------
//
//  Function: InitializeHost1Mux
//
//  This function is to configure the IOMUX for USB H1 Core
//
//  Parameters:
//     NULL
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void InitializeHost1Mux()
{
    //usb_hs1_iomux_connection(void)
    
    //RETAILMSG(1, (TEXT("InitializeHost1Mux\r\n")));
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_SS0, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_SS1, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_SCLK, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_SS2, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_MOSI, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_MISO, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_CSPI1_SPI_RDY, DDK_IOMUX_OUT_ALT1, DDK_IOMUX_IN_ALT1);
    
    //GPR[27] pgp_uh1_suspend hardware mode 1, added by r63494
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_USB_SUSPEND, 1);

    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_SS1, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_SS0, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_SCLK, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH,DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_SS2, DDK_IOMUX_PAD_SLEW_FAST,DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_MOSI, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_MISO, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_CSPI1_SPI_RDY, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_HIGH, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
}


//-----------------------------------------------------------------------------
//
//  Function: InitializeHost2Mux
//
//  This function is to configure the IOMUX for USB H2 Core
//
//  Parameters:
//     NULL
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void InitializeHost2Mux()
{
    DDK_IOMUX_OUT OutMux;    
    DDK_IOMUX_IN  InMux;

    //RETAILMSG(1, (TEXT("InitializeHost2Mux\r\n")));


    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_CLK, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_DIR, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_NXT, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_STP, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_DATA0, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_USBH2_DATA1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);

    // DATA[7:2]
    // daisy_chain_ipp_ind_uh2_data_2_via_STXD3
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_PC_VS2, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_PC_VS2, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFWE_B, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFWE_B, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);

    // daisy_chain_ipp_ind_uh2_data_3_via_SRXD3
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_PC_BVD1, &OutMux, &InMux);  
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_PC_BVD1, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFRE_B, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFRE_B, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);

    // daisy_chain_ipp_ind_uh2_data_4_via_SCK3
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_PC_BVD2, &OutMux, &InMux);  
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_PC_BVD2, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFALE, &OutMux, &InMux);    
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFALE, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);

    // daisy_chain_ipp_ind_uh2_data_5_via_SFS3
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_PC_RST, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_PC_RST, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFCLE, &OutMux, &InMux);    
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFCLE, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);

    // daisy_chain_ipp_ind_uh2_data_6_via_STXD6
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_IOIS16, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_IOIS16, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFWP_B, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFWP_B, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);

    // daisy_chain_ipp_ind_uh2_data_7_via_SRXD6
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_PC_RW_B, &OutMux, &InMux);  
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_PC_RW_B, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxGetPinMux(DDK_IOMUX_PIN_NFCE_B, &OutMux, &InMux);   
    DDKIomuxSetPinMux(DDK_IOMUX_PIN_NFCE_B, OutMux, DDK_IOMUX_IN_NONE);
    DDKIomuxSetGprBit(DDK_IOMUX_GPR_UH2, 1);


    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_CLK, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_DIR, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_NXT, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_STP, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SRXD6, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_STXD6, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SFS3, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SCK3, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_SRXD3, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_STXD3, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_DATA0, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);
    DDKIomuxSetPadConfig(DDK_IOMUX_PAD_USBH2_DATA1, DDK_IOMUX_PAD_SLEW_FAST, DDK_IOMUX_PAD_DRIVE_MAX, DDK_IOMUX_PAD_MODE_CMOS, DDK_IOMUX_PAD_TRIG_CMOS, DDK_IOMUX_PAD_PULL_UP_100K);

}
    
//-----------------------------------------------------------------------------
//
//  Function: InitializeMux
//
//  This function is to configure the IOMUX for USB Host Cores
//
//  Parameters:
//     speed - FULL_SPEED, HIGH_SPEED
//     sel - Selection of the USB cores (0 - H2, 1 - H1, 2- OTG)
//     
//  Returns:
//     offset of the USB core register to be configured.
//
//-----------------------------------------------------------------------------
static DWORD InitializeMux(int speed, int sel)
{
    DWORD off=offset(CSP_USB_REGS, H2)+offset(CSP_USB_REG, CAPLENGTH);
    
    //RETAILMSG(1, (TEXT("InitializeMux with sel=%d speed=%d\r\n"), sel, speed));
    
    if (sel==2) {   // OTG
        InitializeOTGMux();
        off=offset(CSP_USB_REG, CAPLENGTH);
    }
    else if (speed==FULL_SPEED) {
        if (sel==0) {       // Host 2
            off=offset(CSP_USB_REGS, H2)+offset(CSP_USB_REG, CAPLENGTH);        
            InitializeHost2Mux();

        }   
        else {          // Host 1
            off=offset(CSP_USB_REGS, H1)+offset(CSP_USB_REG, CAPLENGTH);
            InitializeHost1Mux();
        }   
    }
    else {
        off = offset(CSP_USB_REGS, H2) + offset(CSP_USB_REG, CAPLENGTH);
        InitializeHost2Mux();
    }       
    
    return off;
}

//-----------------------------------------------------------------------------
//
//  Function: dumpCPLD
//
//  This function is to dump the CPLD information
//
//  Parameters:
//     cpld - Pointer to Mapped CPLD Register
//
//  Returns:
//      None
//
//-----------------------------------------------------------------------------

void dumpCPLD(PCSP_PBC_REGS cpld)
{
    RETAILMSG(1,(L"Dump PBC registers:\r\n"));
    RETAILMSG(1,(L"\tVERSION=%x\r\n", INREG16(&cpld->VERSION)));
    RETAILMSG(1,(L"\tBSTAT2=%x\r\n", INREG16(&cpld->BSTAT2)));
    RETAILMSG(1,(L"\tBCTRL1_SET=%x\r\n", INREG16(&cpld->BCTRL1_SET)));
    RETAILMSG(1,(L"\tBCTRL1_CLEAR=%x\r\n", INREG16(&cpld->BCTRL1_CLEAR)));
    RETAILMSG(1,(L"\tBCTRL2_SET=%x\r\n", INREG16(&cpld->BCTRL2_SET)));
    RETAILMSG(1,(L"\tBCTRL2_CLEAR=%x\r\n", INREG16(&cpld->BCTRL2_CLEAR)));
    RETAILMSG(1,(L"\tBCTRL3_SET=%x\r\n", INREG16(&cpld->BCTRL3_SET)));
    RETAILMSG(1,(L"\tBCTRL3_CLEAR=%x\r\n", INREG16(&cpld->BCTRL3_CLEAR)));
    RETAILMSG(1,(L"\tBCTRL4_SET=%x\r\n", INREG16(&cpld->BCTRL4_SET)));
    RETAILMSG(1,(L"\tBCTRL4_CLEAR=%x\r\n", INREG16(&cpld->BCTRL4_CLEAR)));
    RETAILMSG(1,(L"\tBSTAT1=%x\r\n", INREG16(&cpld->BSTAT1)));
    RETAILMSG(1,(L"\tINT_STATUS=%x\r\n", INREG16(&cpld->INT_STATUS)));
    RETAILMSG(1,(L"\tINT_CUR_STATUS=%x\r\n", INREG16(&cpld->INT_CUR_STATUS)));
    RETAILMSG(1,(L"\tINT_MASK_SET=%x\r\n", INREG16(&cpld->INT_MASK_SET)));
    RETAILMSG(1,(L"\tINT_MASK_CLEAR=%x\r\n", INREG16(&cpld->INT_MASK_CLEAR)));
}

//-----------------------------------------------------------------------------
//
//  Function: InitializeCPLD
//
//  This function is to configure the CPLD to corresponding USB core
//
//  Parameters:
//     sel - the value in which USB core to configure. 
//     
//  Returns:
//     Speed of the USB core - HIGH_SPEED or FULL_SPEED
//
//-----------------------------------------------------------------------------
// sel = 0 => Host 2
// sel = 1 => Host 1
// sel =2 => OTG
static int InitializeCPLD(WORD * sel)
{
    int r;
#if (USB_HOST_MODE==0)||(USB_HOST_MODE==1)
    // OTG port, be sure to turn off the USB function driver.   
    *sel=2;
    #if (USB_HOST_MODE==0)  //OTG Full Speed - ISP1301
        //Set this to OTG_FS on base board
        //Clear this to OTG_FS on ATLAS board
        r=FULL_SPEED;
    #else                   //OTG High Speed - ISP1504
        r=HIGH_SPEED;
        DEBUGMSG(1, (L"High Speed USB OTG Host\r\n"));
    #endif
#else 
    #if (USB_HOST_MODE!=4)
    {
        DEBUGMSG(1, (L"Full speed USB host\r\n"));
        
        #if (USB_HOST_MODE==2)
            *sel=1;
        #else
            *sel=0;  
        #endif

        r=FULL_SPEED;
    }
#else
    {
        *sel = 0;
        DEBUGMSG(1, (L"High speed USB host\r\n"));