wfi.s

freescale i.mx31 BSP CE5.0全部源码

;------------------------------------------------------------------------------
;
;  Copyright (C) 2006, Freescale Semiconductor, Inc. All Rights Reserved
;  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
;  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
;  FREESCALE SEMICONDUCTOR, INC.
;
;------------------------------------------------------------------------------
;
;  Module: wfi.s
;
;  This module implements the OAL assembly-level support for entering the ARM
;  wait-for-interrupt low-power mode.
;
;------------------------------------------------------------------------------
;
;  Function: OALCPUEnterWFI
;
;  This function provides the instruction sequence for requesting the ARM CPU 
;  to enter the WFI (wait-for-interrupt).  This routine will be called by
;  the OALCPUIdle and OEMPowerOff.  
;
;  Parameters:
;      None.
;
;  Returns:
;      None.
;
;------------------------------------------------------------------------------

    INCLUDE kxarm.h
    INCLUDE armmacros.s

;
; ARM constants
;
ARM_CTRL_ICACHE             EQU     (1 << 12)

    TEXTAREA

    LEAF_ENTRY OALCPUEnterWFI

    ; Begin workaround for ARM Errata #336501 
    ; (WFI does not drain data cache write buffer)

    ;mov     r0, #0
    ;mcr     p15, 0, r0, c7, c10, 2              ; Clean data cache line
    ;mcr     p15, 0, r0, c7, c10, 5              ; Data memory barrier

    ; End workaround for ARM Errata #336501


    ; Begin workaround for errata #TBD
    ; (Behavior of FIQ/IRQ causes problem exiting wfi mode)

    mrc     p15, 0, r0, c1, c0, 0               ; Read system control reg
    bic     r0, r0, #ARM_CTRL_ICACHE            ; Disable ICache
    mcr     p15, 0, r0, c1, c0, 0               ; Update system control reg

    nop                                         ; 7 instructions are required
    nop                                         ; to prevent prefetch of 
    nop                                         ; instruction after WFI
    nop
    nop
    nop
    mov     r0,#0
    mcr     p15, 0, r0, c7, c0, 4               ; Enter WFI

    nop                                         ; 8 instructions are required
    nop                                         ; to prevent premature  
    nop                                         ; execution of the instruction
    nop                                         ; following the WFI
    nop
    nop
    nop
    nop

    mrc     p15, 0, r0, c1, c0, 0               ; Read system control reg
    orr     r0, r0, #ARM_CTRL_ICACHE            ; Enable ICache
    mcr     p15, 0, r0, c1, c0, 0               ; Update system control reg

    ; End workaround for errata #TBD

    RETURN

    END