k9f4g08u0m.h

freescale i.mx31 BSP CE5.0全部源码

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved
//  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
//  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
//  Freescale Semiconductor, Inc.
//
//------------------------------------------------------------------------------
//
//  File:  K9K1G08U0B.h
//
//  Contains definitions for FMD impletation of the Samsung K9K1G08U0B NAND
//  flash memory device.
//
//------------------------------------------------------------------------------
#ifndef __K9F4G08U0M_H__
#define __K9F4G08U0M_H__

#define CMD_READID              0x90        // Read ID
#define CMD_READ                0x00        // Read data field
#define CMD_READ2               0x30        // Read spare field
#define CMD_RESET               0xFF        // Reset
#define CMD_ERASE               0x60        // Erase setup
#define CMD_ERASE2              0xD0        // Erase 
#define CMD_WRITE               0x80        // Sequential data input
#define CMD_WRITE2              0x10        // Program
#define CMD_STATUS              0x70        // Read status

#define NAND_BLOCK_CNT          (4096)       // 4096 blocks
#define NAND_PAGE_CNT           (64)        // Each Block has 64 Pages
#define NAND_PAGE_SIZE          (2048)       // Each Page has 2048 Bytes
#define NAND_BLOCK_SIZE         (NAND_PAGE_CNT * NAND_PAGE_SIZE)
#define NAND_BBI_OFFSET         5           // Bad block info spare offset
#define NAND_BUS_WIDTH          8           // 8-bit bus

#define NAND_MAKER_CODE         0xEC        // Samsung
#define NAND_DEVICE_CODE        0xDC

#define NAND_STATUS_MASK_ERROR  (1U << 0)   // Status Bit0 indicates error

#define NAND_ID_CODE            ((NAND_DEVICE_CODE << 8) | NAND_MAKER_CODE)

// K9F4G08U0M address is sent in 5-cycles
//      1st Cycle:  Column address A[7:0]
//      2nd Cycle: Column address A[11:8]
//      3rd Cycle:  Page address A[19:12]
//      4th Cycle:  Page address A[27:20]
//      5th Cycle:  Page address A[29:28]
//
// notes:
//     when translate address into col & page
//      Column  address[10..0]
//      Page      address[28..11]  
//
#define NF_ADDR_COL(addr)       { NF_ADDR((addr) & 0xFF);  \
                                 NF_ADDR(((addr) >> 8) & 0x07); }

#define NF_ADDR_PAGE(addr)      { NF_ADDR(((addr) >>  11) & 0xFF);    \
                                  NF_ADDR(((addr) >> 19) & 0xFF);    \
                                  NF_ADDR(((addr) >> 27) & 0x3); }     

// K9F4G08U0M supports sequential row and serial page access, so we only
// need to send read command and address on first access.
#define NF_READ_SEQ(sectAddr)   (FALSE)

#endif    // __K9F4G08U0M_H__