nandfmd.h

freescale i.mx31 BSP CE5.0全部源码

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved
//  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
//  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
//  Freescale Semiconductor, Inc.
//
//------------------------------------------------------------------------------
//
//  File:  nandfmd.h
//
//  Contains definitions for FMD impletation of the SoC NAND flash controller 
//  and NAND memory device.
//
//------------------------------------------------------------------------------
#ifndef __NANDFMD_H__
#define __NANDFMD_H__

// NAND flash type
#define NAND_K9K1G08U0B  0
#define NAND_K9F4G08U0M 1

// select one of above NAND type
#define NAND_FLASH_TYPE  NAND_K9F4G08U0M

// NFC operate macro
#define NF_CMD(cmd)             { OUTREG16(&g_pNFC->NAND_FLASH_CMD, (cmd)); \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FCMD)); \
                                  NFCWait(TRUE); }

#define NF_ADDR(addr)           { OUTREG16(&g_pNFC->NAND_FLASH_ADD, (addr)); \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FADD)); \
                                  NFCWait(TRUE); }

#define NF_RD_PAGE()            { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_PAGE)); \
                                  NFCWait(FALSE); }

#define NF_RD_SPARE()           { SETREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_PAGE)); \
                                  NFCWait(TRUE); }

#define NF_WR_PAGE()            { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDI)); \
                                  NFCWait(FALSE); }

#define NF_WR_SPARE()           { SETREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDI)); \
                                  NFCWait(TRUE); }

#define NF_RD_ID()              { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_ID)); \
                                  NFCWait(TRUE); }

#define NF_RD_STATUS()          { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_STATUS)); \
                                  NFCWait(TRUE); }

#define NF_BUF_ADDR(num)     { OUTREG16(&g_pNFC->RAM_BUFF_ADDRESS, (num)); }


// Include NAND memory device definitions
#if    (NAND_FLASH_TYPE == NAND_K9K1G08U0B)
#include "K9K1G08U0B.h"
#elif (NAND_FLASH_TYPE == NAND_K9F4G08U0M)
#include "K9F4G08U0M.h"
#else
#error "NAND_FLASH_TYPE undefined."
#endif

#endif    // __K9K1G08U0B_H__