flushl2.s

freescale i.mx31 BSP CE5.0全部源码

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;
;-------------------------------------------------------------------------------
;
;  File: flushl2.s
;
;  This file implements L2 cache flushing for the Freescale ARM1136 CPU.
;
;-------------------------------------------------------------------------------
        INCLUDE kxarm.h
        INCLUDE armmacros.s
        INCLUDE oal_cache.inc

L2CC_INVWAY_OFFSET          EQU     0x77C

        IMPORT g_pL2CC

        TEXTAREA

;-------------------------------------------------------------------------------
;
;  Function:  OALFlushL2Cache
;
        LEAF_ENTRY OALFlushL2Cache

        ldr     r1, =g_pL2CC
        ldr     r1, [r1]
        
        ; Since we configure the L2 for write-through mode, we only need to
        ; drain the write buffer and invalidate all of the ways.  The write
        ; buffer is automatically drained during any background cache 
        ; maintenance operation.

        ; 
        ; Invalidate L2 cache memory
        ; 
        ldr     r0, =0x000000FF
        str     r0, [r1, #L2CC_INVWAY_OFFSET]

        ;
        ; Wait for invalidation to complete
        ;
L2_invalidate
        ldr     r0, [r1, #L2CC_INVWAY_OFFSET]
        cmp     r0, #0
        bne     L2_invalidate

        RETURN

        END

;-------------------------------------------------------------------------------