nand.h

freescale i.mx31 BSP CE5.0全部源码

;------------------------------------------------------------------------------
;
;	Copyright (C) 2004,	Motorola Inc. All Rights Reserved
;
;-----------------------------------------------------------------------------
;
;  Copyright (C) 2004, Freescale Semiconductor, Inc. All Rights Reserved
;  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
;  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
;  FREESCALE SEMICONDUCTOR, INC.
;
;-----------------------------------------------------------------------------
;
; File:		nand.h
; Purpose:	Implements the NAND flash specific defines for nandloader.s
;
; Notes:
;
; Date:	   	03/23/2004
;
; Modifications:
; MM/DD/YYYY       	Initials	Change description
;

	IF :LNOT: :DEF: _SRC_BOOTLOADER_IPL_NANDLOADER_NAND_H
_SRC_BOOTLOADER_IPL_NANDLOADER_NAND_H            EQU     1

; NAND Flash part defines
K9F1208Q0A		EQU				1
K9F5616Q0C		EQU				2

	GBLA		NAND_PART

; Note: Only enable one of these at any one time
;NAND_PART			SETA	K9F1208Q0A
NAND_PART			SETA	K9F5616Q0C


; TRUE to enable sending 4th address cycle
	GBLL		SEND_4TH_ADDR_CYCLE
	IF NAND_PART = K9F1208Q0A
SEND_4TH_ADDR_CYCLE		SETL	{TRUE}
	ENDIF

	IF NAND_PART = K9F5616Q0C
SEND_4TH_ADDR_CYCLE		SETL	{FALSE}
	ENDIF

; Set TRUE if device supports sequential page read
	GBLL		SEQUENTIAL_PAGE_READ_SUPPORT
SEQUENTIAL_PAGE_READ_SUPPORT		SETL	{FALSE}

; Nandloader defines
NAND_PAGE_SIZE_LSHIFT		EQU		9
NAND_NUM_PAGE_LSHIFT		EQU		5
NAND_BLOCK_SIZE_LSHIFT		EQU		(NAND_PAGE_SIZE_LSHIFT + NAND_NUM_PAGE_LSHIFT)
NAND_NUM_PAGES				EQU		(1 << NAND_NUM_PAGE_LSHIFT)


	IF NAND_PART = K9F5616Q0C
NAND_NUM_BLOCKS				EQU		2048
NAND_BAD_BLOCK_OFFSET		EQU		11	; byte 11 of spare area
	ENDIF

	IF NAND_PART = K9F1208Q0A
NAND_NUM_BLOCKS				EQU		4096
NAND_BAD_BLOCK_OFFSET		EQU		5	; byte 5 of spare area
	ENDIF

; image load region information
NAND_INFO_LOAD_IMAGE_SIZE		EQU		0x00040000
NAND_INFO_LOAD_IMAGE_BLOCKS		EQU		(NAND_INFO_LOAD_IMAGE_SIZE >> NAND_BLOCK_SIZE_LSHIFT)

; NAND flash commands
NAND_CMD_READ					EQU		0x00
NAND_CMD_READ2					EQU		0x50

	ENDIF

	END