init.c

freescale i.mx31 BSP CE5.0全部源码

//-----------------------------------------------------------------------------
//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//-----------------------------------------------------------------------------
//
//  Copyright (C) 2004, Freescale Semiconductor, Inc. All Rights Reserved
//  THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
//  BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
//  FREESCALE SEMICONDUCTOR, INC.
//
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
//
//  File:  init.c
//
//  EVB board initialization code.
//
//-----------------------------------------------------------------------------
#include <bsp.h>
#include <pehdr.h>
#include <Romldr.h>

//-----------------------------------------------------------------------------
// Types
#ifndef BSP_NO_TRUST
typedef BOOL (* OEMLoadInit_t)(LPWSTR lpszName);
typedef DWORD (* OEMLoadModule_t)(LPBYTE lpData, DWORD cbData);
#endif // BSP_NO_TRUST

//-----------------------------------------------------------------------------
// External Functions
#ifndef BSP_NO_TRUST
extern BOOL InitPubKey(const BYTE *KeyBlob, DWORD cbKeyBlob);
extern BOOL OEMCertifyModuleInit(LPWSTR lpModuleName);
extern DWORD OEMCertifyModule(LPBYTE lpData, DWORD cbData);
#endif // BSP_NO_TRUST
extern UINT32 OALTimerGetClkFreq(void);
extern UINT32 OALTimerGetClkPrescalar(void);
extern BOOL OALPmicInit(UINT32 voltCodeNormal, UINT32 voltCodeStandby);

//-----------------------------------------------------------------------------
// External Variables
extern PCSP_CCM_REGS g_pCCM;

#ifndef BSP_NO_TRUST
extern OEMLoadInit_t pOEMLoadInit;
extern OEMLoadModule_t pOEMLoadModule;

/*
 * This is the public used to verify the signature of trusted applications.
 */
static const unsigned char g_bSignPublicKeyBlob[] = {
    0x06,0x02,0x00,0x00,0x00,0x24,0x00,0x00,0x52,0x53,0x41,0x31,0x00,0x02,
    0x00,0x00,0x01,0x00,0x01,0x00,0x53,0x93,0xe8,0x12,0x13,0x63,0x44,0x9e,
    0x07,0xd7,0xb7,0xa3,0x20,0x2c,0x2f,0xe7,0x95,0x23,0xba,0xec,0x79,0xa9,
    0x37,0xd3,0x09,0xd7,0x53,0x47,0x27,0x76,0x10,0x1d,0xbd,0x22,0x61,0xd0,
    0x82,0x91,0x26,0xf6,0x1f,0x94,0x74,0x24,0xbc,0xe6,0xd1,0x07,0x86,0x2f,
    0xad,0x60,0x50,0x7e,0x55,0xb5,0x58,0x46,0xcd,0xe9,0xf5,0x89,0xb1,0xe5
};
#endif // BSP_NO_TRUST

UINT32 *g_pL2CC = NULL;
PCSP_SDMA_REGS g_pSDMA;
UINT32 g_SREV;

// 
extern void (*lpNKHaltSystem)(void);

//-----------------------------------------------------------------------------
//
// Function: OEMHaltSystem
//
// Function turns on leds to indicate error condition before system halt.
//
// Parameters:
//
// Returns:
//      
//
//-----------------------------------------------------------------------------
void OEMHaltSystem(void)
{
    CSP_PBC_REGS *pPBC;

    // On both on board leds
    pPBC = (PCSP_PBC_REGS)OALPAtoVA((UINT32)BSP_BASE_REG_PA_PBC_BASE, FALSE);
    OUTREG16(&pPBC->BCTRL1_SET, CSP_BITFMASK(PBC_BCTRL1_SET_LED0));
    OUTREG16(&pPBC->BCTRL1_SET, CSP_BITFMASK(PBC_BCTRL1_SET_LED1));
}

//------------------------------------------------------------------------------
//
//  Function:  OEMInit
//
//  This is Windows CE OAL initialization function. It is called from kernel
//  after basic initialization is made.
//
void OEMInit()
{
    BSP_ARGS *pBspArgs = (BSP_ARGS *)IMAGE_SHARE_ARGS_UA_START;
    UINT32 countsPerMsec;
    
    OALMSG(OAL_FUNC, (L"+OEMInit\r\n"));

    // Initialize system halt handler.
    lpNKHaltSystem = OEMHaltSystem;

    // Set memory size for DrWatson kernel support
    dwNKDrWatsonSize = 128 * 1024;

    // Initilize cache globals
    OALCacheGlobalsInit();

    // Reset GPF flags set by bootloader or RVD.  Rev 1.1 silicon now uses 
    // these flags for internal CCM control.
    INSREG32BF(&g_pCCM->RCSR, CCM_RCSR_GPF, 0);

    // Read silicon rev
    g_SREV = *((UINT32 *) OALPAtoUA(CSP_BASE_REG_PA_IIM + 0x24));
    OALMSG(OAL_INFO, (L"OEMInit:  SREV = 0x%x\r\n", g_SREV));

    // Configure CCM clock gating.  Gate all clocks
    // except those needed by OAL.  
    //
    // CGR[0]:  
    //  CG3 (EPIT1) = run all = (3 << 6)    = 0x000000C0
    //  CG7 (SDMA) = run all = (3 << 14)    = 0x0000C000
    //  CG10 (UART1) = run all = (3 << 20)  = 0x00300000
    //                                      ------------
    //                                        0x0030C0C0
    // 
    // CGR[1]:  
    //  CG5 (WDOG) = run all = (3 << 10)    = 0x00000C00
    //                                      ------------
    //                                        0x00000C00
    //
    // NOTE:  For PMC we keep the IPU clocks enabled since
    //        the bootloader will configure and enable the
    //        display.
    //
    // CGR[1] (PMC ONLY):  
    //  CG5 (WDOG) = run all = (3 << 10)    = 0x00000C00
    //  CG11 (IPU) = run all = (3 << 22)    = 0x00C00000
    //                                      ------------
    //                                        0x00C00C00
    //
    // CGR[2]:  
    //  CG4 (EMI) = run all = (3 << 8)      = 0x00000300
    //  CG15-CG7 = reserved                 = 0xFFFFC000
    //                                      ------------
    //                                        0xFFFFC300
#if (DEBUG_PORT == DBG_UART1)
    OUTREG32(&g_pCCM->CGR[0], 0x0030C0C0);
#else
    OUTREG32(&g_pCCM->CGR[0], 0x0000C0C0);
#endif
#ifdef PLAT_PMC
    OUTREG32(&g_pCCM->CGR[1], 0x00C00C00);
#else
    OUTREG32(&g_pCCM->CGR[1], 0x00000C00);
#endif
    OUTREG32(&g_pCCM->CGR[2], 0xFFFFC300);

    // Configure well bias parameters for suspend mode
    INSREG32BF(&g_pCCM->PMCR1, CCM_PMCR1_CPSPA, 0xC);

    // Update global BSP args struct with user switches on ADS board
    OALBspArgsInit((BSP_ARGS *)IMAGE_SHARE_ARGS_UA_START);        

    // If user selected to leave L2 disabled, let it remain
    // unmapped so OEMCacheRangeFlush will not perform
    // maintenance
    if (pBspArgs->bL2enable)
    {
        // Map access to L2CC
        g_pL2CC = OALPAtoUA(CSP_BASE_REG_PA_L2CC);
        if (g_pL2CC == NULL)
        {
            // Error message is all we can do since OEMInit has no return
            OALMSG(OAL_ERROR, (L"OEMInit:  L2CC null pointer!\r\n"));
        }
        OALMSG(OAL_INFO, (L"OEMInit:  L2 cache is enabled (AUXCR = 0x%x)\r\n", INREG32((OALPAtoUA(CSP_BASE_REG_PA_L2CC+0x104)))));
    }
    else
    {
        OALMSG(OAL_INFO, (L"OEMInit:  L2 cache is disabled\r\n"));
    }

#ifdef PLAT_PMC

    // TODO: This is needed because currently EBOOT sets this to a different value than PMCBOOT. Once we have PMCBOOT on the device, we can eliminate this.
    pBspArgs->header.bspVersion = BSP_ARGS_VERSION;

    // Perform PMC common initializatoin
    PMCInit(OALVERMAJOR, OALVERMINOR);

#else

#ifndef BSP_NO_TRUST
    // Set the module signature verification hooks.
    pOEMLoadInit = OEMCertifyModuleInit;
    pOEMLoadModule = OEMCertifyModule;

    // Initialize the signature verification public key.
    InitPubKey(g_bSignPublicKeyBlob, sizeof(g_bSignPublicKeyBlob));
#endif // BSP_NO_TRUST

    // Initialize interrupts
    if (!OALIntrInit()) {
        OALMSG(OAL_ERROR, (
            L"ERROR: OEMInit: failed to initialize interrupts\r\n"
        ));
    }

#endif // PLAT_PMC

    // Initialize system clock
    countsPerMsec = OALTimerGetClkFreq() / ((OALTimerGetClkPrescalar() + 1) * 1000);
    OALTimerInit(RESCHED_PERIOD, countsPerMsec, countsPerMsec / 100 + 2);

    // Initialize SDMA with address of shared region
    g_pSDMA = OALPAtoUA(CSP_BASE_REG_PA_SDMA);
    if (g_pSDMA == NULL)
    {
        // Error message is all we can do since OEMInit has no return
        OALMSG(OAL_ERROR, (L"OEMInit:  SDMA null pointer!\r\n"));
    }
    else
    {
        // Set the channel 0 pointer to the shared region physical address
        OUTREG32(&g_pSDMA->MC0PTR, BSP_SDMA_MC0PTR);

        // Configure SDMA/AHB clock ratio
        if (pBspArgs->clockFreq[DDK_CLOCK_SIGNAL_AHB] == 
            pBspArgs->clockFreq[DDK_CLOCK_SIGNAL_IPG])
        {
            INSREG32BF(&g_pSDMA->CONFIG, SDMA_CONFIG_ACR, SDMA_CONFIG_ACR_AHB1X);
        }
        else
        {
            INSREG32BF(&g_pSDMA->CONFIG, SDMA_CONFIG_ACR, SDMA_CONFIG_ACR_AHB2X);
        }

        // Configure SDMA for static context switch
        INSREG32BF(&g_pSDMA->CONFIG, SDMA_CONFIG_CSM, SDMA_CONFIG_CSM_STATIC);
        
    }

    // Initialize the PMIC interface
    OALPmicInit(BSP_PMIC_NORMAL_VOLT, BSP_PMIC_STANDBY_VOLT);

    // PMIC supply voltages are now configured and we can safely bump
    // up ARM clock speed
    if (pBspArgs->bHighSpeedEnable)
    {
        pBspArgs->clockFreq[DDK_CLOCK_SIGNAL_ARM] = 
            pBspArgs->clockFreq[DDK_CLOCK_SIGNAL_MCUPLL];
        OALMSG(OAL_INFO, 
            (TEXT("SWITCHING TO HIGH SPEED ARM CLOCK  = %d Hz\r\n"), 
            pBspArgs->clockFreq[DDK_CLOCK_SIGNAL_ARM]));    
        INSREG32BF(&g_pCCM->PDR0, CCM_PDR0_MCU_PODF, 0);
    }
    
    // Initialize the KITL connection if required
    OALKitlStart();

#ifdef PLAT_WPC
    NKForceCleanBoot();
#endif

    OALMSG(OAL_FUNC, (L"-OEMInit\r\n"));
}

//------------------------------------------------------------------------------