📄 uart.c
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*pulBaud = (ulUARTClk * 4) / ((64 * ulInt) + ulFrac);
//
// Get the parity, data length, and number of stop bits.
//
*pulConfig = (HWREG(ulBase + UART_O_LCRH) &
(UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 |
UART_LCRH_EPS | UART_LCRH_PEN));
}
//*****************************************************************************
//
//! Enables transmitting and receiving.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Sets the UARTEN, TXE, and RXE bits, and enables the transmit and receive
//! FIFOs.
//!
//! \return None.
//
//*****************************************************************************
void
UARTEnable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Enable the FIFO.
//
HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN;
//
// Enable RX, TX, and the UART.
//
HWREG(ulBase + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
UART_CTL_RXE);
}
//*****************************************************************************
//
//! Disables transmitting and receiving.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Clears the UARTEN, TXE, and RXE bits, then waits for the end of
//! transmission of the current character, and flushes the transmit FIFO.
//!
//! \return None.
//
//*****************************************************************************
void
UARTDisable(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Wait for end of TX.
//
while(HWREG(ulBase + UART_O_FR) & UART_FR_BUSY)
{
}
//
// Disable the FIFO.
//
HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN);
//
// Disable the UART.
//
HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |
UART_CTL_RXE);
}
//*****************************************************************************
//
//! Enables SIR (IrDA) mode on specified UART.
//!
//! \param ulBase is the base address of the UART port.
//! \param bLowPower indicates if SIR Low Power Mode is to be used.
//!
//! Enables the SIREN control bit for IrDA mode on the UART. If the
//! \e bLowPower flag is set, then SIRLP bit will also be set.
//!
//! \note SIR (IrDA) operation is supported only on Fury-class devices.
//!
//! \return None.
//
//*****************************************************************************
void
UARTEnableSIR(unsigned long ulBase, tBoolean bLowPower)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Enable SIR and SIRLP (if appropriate).
//
if(bLowPower)
{
HWREG(ulBase + UART_O_CTL) |= (UART_CTL_SIREN | UART_CTL_SIRLP);
}
else
{
HWREG(ulBase + UART_O_CTL) |= (UART_CTL_SIREN);
}
}
//*****************************************************************************
//
//! Disables SIR (IrDA) mode on the specified UART.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Clears the SIREN (IrDA) and SIRLP (Low Power) bits.
//!
//! \note SIR (IrDA) operation is supported only on Fury-class devices.
//!
//! \return None.
//
//*****************************************************************************
void
UARTDisableSIR(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Disable SIR and SIRLP (if appropriate).
//
HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_SIREN | UART_CTL_SIRLP);
}
//*****************************************************************************
//
//! Determines if there are any characters in the receive FIFO.
//!
//! \param ulBase is the base address of the UART port.
//!
//! This function returns a flag indicating whether or not there is data
//! available in the receive FIFO.
//!
//! \return Returns \b true if there is data in the receive FIFO, and \b false
//! if there is no data in the receive FIFO.
//
//*****************************************************************************
tBoolean
UARTCharsAvail(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Return the availability of characters.
//
return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true);
}
//*****************************************************************************
//
//! Determines if there is any space in the transmit FIFO.
//!
//! \param ulBase is the base address of the UART port.
//!
//! This function returns a flag indicating whether or not there is space
//! available in the transmit FIFO.
//!
//! \return Returns \b true if there is space available in the transmit FIFO,
//! and \b false if there is no space available in the transmit FIFO.
//
//*****************************************************************************
tBoolean
UARTSpaceAvail(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Return the availability of space.
//
return((HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) ? false : true);
}
//*****************************************************************************
//
//! Receives a character from the specified port.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Gets a character from the receive FIFO for the specified port.
//!
//! This function replaces the original UARTCharNonBlockingGet() API and
//! performs the same actions. A macro is provided in <tt>uart.h</tt> to map
//! the original API to this API.
//!
//! \return Returns the character read from the specified port, cast as a
//! \e long. A \b -1 will be returned if there are no characters present in
//! the receive FIFO. The UARTCharsAvail() function should be called before
//! attempting to call this function.
//
//*****************************************************************************
long
UARTCharGetNonBlocking(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// See if there are any characters in the receive FIFO.
//
if(!(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE))
{
//
// Read and return the next character.
//
return(HWREG(ulBase + UART_O_DR));
}
else
{
//
// There are no characters, so return a failure.
//
return(-1);
}
}
//*****************************************************************************
//
//! Waits for a character from the specified port.
//!
//! \param ulBase is the base address of the UART port.
//!
//! Gets a character from the receive FIFO for the specified port. If there
//! are no characters available, this function will wait until a character is
//! received before returning.
//!
//! \return Returns the character read from the specified port, cast as an
//! \e long.
//
//*****************************************************************************
long
UARTCharGet(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// Wait until a char is available.
//
while(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE)
{
}
//
// Now get the char.
//
return(HWREG(ulBase + UART_O_DR));
}
//*****************************************************************************
//
//! Sends a character to the specified port.
//!
//! \param ulBase is the base address of the UART port.
//! \param ucData is the character to be transmitted.
//!
//! Writes the character \e ucData to the transmit FIFO for the specified port.
//! This function does not block, so if there is no space available, then a
//! \b false is returned, and the application will have to retry the function
//! later.
//!
//! This function replaces the original UARTCharNonBlockingPut() API and
//! performs the same actions. A macro is provided in <tt>uart.h</tt> to map
//! the original API to this API.
//!
//! \return Returns \b true if the character was successfully placed in the
//! transmit FIFO, and \b false if there was no space available in the transmit
//! FIFO.
//
//*****************************************************************************
tBoolean
UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData)
{
//
// Check the arguments.
//
ASSERT((ulBase == UART0_BASE) || (ulBase == UART1_BASE) ||
(ulBase == UART2_BASE));
//
// See if there is space in the transmit FIFO.
//
if(!(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF))
{
//
// Write this character to the transmit FIFO.
//
HWREG(ulBase + UART_O_DR) = ucData;
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