📄 enet_lwip.c
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void
lwip_tick(unsigned long ulTickMS)
{
static tBoolean bDisplayIP = false;
static tBoolean bIPDisplayed = false;
//
// Increment the assorted timers.
//
g_ulTCPFastTimer += ulTickMS;
g_ulTCPSlowTimer += ulTickMS;
g_ulARPTimer += ulTickMS;
g_ulDHCPCoarseTimer += ulTickMS;
g_ulDHCPFineTimer += ulTickMS;
//
// Check and process incoming packets
//
ethernetif_input(&g_sEMAC_if);
//
// Check ARP Timer.
//
if(g_ulARPTimer >= ARP_TMR_INTERVAL)
{
g_ulARPTimer = 0;
etharp_tmr();
}
//
// Check TCP Slow Timer.
//
if(g_ulTCPSlowTimer >= TCP_SLOW_INTERVAL)
{
g_ulTCPSlowTimer = 0;
tcp_slowtmr();
}
//
// Check TCP Fast Timer.
//
if(g_ulTCPFastTimer >= TCP_FAST_INTERVAL)
{
g_ulTCPFastTimer = 0;
tcp_fasttmr();
}
//
// If DHCP is enabled/active, run the timers.
//
if(NULL != g_sEMAC_if.dhcp)
{
//
// Check DCHP Coarse Timer.
//
if(g_ulDHCPCoarseTimer >= (DHCP_COARSE_TIMER_SECS * 1000))
{
g_ulDHCPCoarseTimer = 0;
dhcp_coarse_tmr();
}
//
// Check DCHP Fine Timer.
//
if(g_ulDHCPFineTimer >= DHCP_FINE_TIMER_MSECS)
{
g_ulDHCPFineTimer = 0;
dhcp_fine_tmr();
}
//
// Check to see if DHCP is bound.
//
if(g_sEMAC_if.dhcp->state == DHCP_BOUND)
{
bDisplayIP = true;
}
//
// Check to see if if the DHCP process has taken too long.
//
else if(g_ulDHCPTimeoutTimer > (DHCP_EXPIRE_TIMER_SECS * 1000))
{
struct ip_addr xIpAddr, xNetMask, xGateway;
//
// Disable the DHPC process.
//
dhcp_stop(&g_sEMAC_if);
//
// Program the default IP settings.
//
IP4_ADDR(&xIpAddr, DEFAULT_IPADDR0, DEFAULT_IPADDR1,
DEFAULT_IPADDR2, DEFAULT_IPADDR3);
IP4_ADDR(&xNetMask, DEFAULT_NET_MASK0, DEFAULT_NET_MASK1,
DEFAULT_NET_MASK2, DEFAULT_NET_MASK3);
IP4_ADDR(&xGateway, DEFAULT_GATEWAY_ADDR0, DEFAULT_GATEWAY_ADDR1,
DEFAULT_GATEWAY_ADDR2, DEFAULT_GATEWAY_ADDR3);
netif_set_ipaddr(&g_sEMAC_if, &xIpAddr);
netif_set_gw(&g_sEMAC_if, &xGateway);
netif_set_netmask(&g_sEMAC_if, &xNetMask);
//
// Prompt a display of the IP settings.
//
bDisplayIP = true;
}
//
// Display DHCP Status.
//
else
{
static int iColumn = 6;
//
// Increment the DHCP timeout timer.
//
g_ulDHCPTimeoutTimer += ulTickMS;
//
// Update status bar on the display.
//
RIT128x96x4Enable(1000000);
if(iColumn < 12)
{
RIT128x96x4StringDraw("< ", 0, 24, 15);
RIT128x96x4StringDraw("*",iColumn, 24, 7);
}
else
{
RIT128x96x4StringDraw(" *",iColumn - 6, 24, 7);
}
iColumn++;
if(iColumn > 114)
{
iColumn = 6;
RIT128x96x4StringDraw(" >", 114, 24, 15);
}
RIT128x96x4Disable();
}
}
//
// Check if DHCP has been bound.
//
if(bDisplayIP && !bIPDisplayed)
{
RIT128x96x4Enable(1000000);
RIT128x96x4StringDraw(" ", 0, 16, 15);
RIT128x96x4StringDraw(" ", 0, 24, 15);
RIT128x96x4StringDraw("IP: ", 0, 16, 15);
RIT128x96x4StringDraw("MASK: ", 0, 24, 15);
RIT128x96x4StringDraw("GW: ", 0, 32, 15);
DisplayIPAddress(g_sEMAC_if.ip_addr.addr, 36, 16);
DisplayIPAddress(g_sEMAC_if.netmask.addr, 36, 24);
DisplayIPAddress(g_sEMAC_if.gw.addr, 36, 32);
RIT128x96x4Disable();
bIPDisplayed = true;
}
}
//*****************************************************************************
//
// This example demonstrates the use of the Ethernet Controller.
//
//*****************************************************************************
int
main(void)
{
unsigned long ulUser0, ulUser1;
unsigned char pucMACArray[8];
//
// Set the clocking to run directly from the crystal.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
//
// Initialize the OLED display.
//
RIT128x96x4Init(1000000);
RIT128x96x4StringDraw("Ethernet with lwIP", 12, 0, 15);
//
// Check for presence of Ethernet Controller.
//
if(!SysCtlPeripheralPresent(SYSCTL_PERIPH_ETH))
{
RIT128x96x4StringDraw("Ethernet Controller", 0, 16, 15);
RIT128x96x4StringDraw("Not Found!", 0, 24, 15);
DiagExit(1);
}
//
// Enable and Reset the Ethernet Controller.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
//
// Enable Port F for Ethernet LEDs.
// LED0 Bit 3 Output
// LED1 Bit 2 Output
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIODirModeSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_DIR_MODE_HW);
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3,
GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
//
// Configure SysTick for a periodic interrupt.
//
SysTickPeriodSet(SysCtlClockGet() / SYSTICKHZ);
SysTickEnable();
SysTickIntEnable();
//
// Enable processor interrupts.
//
IntMasterEnable();
//
// Configure the hardware MAC address for Ethernet Controller filtering of
// incoming packets.
//
// For the LM3S6965 Evaluation Kit, the MAC address will be stored in the
// non-volatile USER0 and USER1 registers. These registers can be read
// using the FlashUserGet function, as illustrated below.
//
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
//
// We should never get here. This is an error if the MAC address
// has not been programmed into the device. Exit the program.
//
RIT128x96x4StringDraw("MAC Address", 0, 16, 15);
RIT128x96x4StringDraw("Not Programmed!", 0, 24, 15);
DiagExit(2);
}
//
// Convert the 24/24 split MAC address from NV ram into a 32/16 split
// MAC address needed to program the hardware registers, then program
// the MAC address into the Ethernet Controller registers.
//
pucMACArray[0] = ((ulUser0 >> 0) & 0xff);
pucMACArray[1] = ((ulUser0 >> 8) & 0xff);
pucMACArray[2] = ((ulUser0 >> 16) & 0xff);
pucMACArray[3] = ((ulUser1 >> 0) & 0xff);
pucMACArray[4] = ((ulUser1 >> 8) & 0xff);
pucMACArray[5] = ((ulUser1 >> 16) & 0xff);
//
// Program the hardware with it's MAC address (for filtering).
//
EthernetMACAddrSet(ETH_BASE, pucMACArray);
//
// Initialize the file system.
//
RIT128x96x4Disable();
fs_init();
//
// Initialize all of the lwIP code, as needed, which will also initialize
// the low-level Ethernet code.
//
lwip_init();
//
// Initialize a sample httpd server.
//
httpd_init();
//
// Main Application Loop (for systems with no RTOS). Run every SYSTICK.
//
while(true)
{
//
// Wait for an event to occur.
//
while(!g_ulFlags)
{
}
//
// Check if a SYSTICK has occurred.
//
if(HWREGBITW(&g_ulFlags, FLAG_SYSTICK))
{
//
// Clear the SysTick interrupt flag.
//
HWREGBITW(&g_ulFlags, FLAG_SYSTICK) = 0;
//
// Run the Luminary lwIP system tick.
//
lwip_tick(SYSTICKMS);
//
// Run the file system tick.
//
fs_tick(SYSTICKMS);
}
//
// Check if an RX Packet was received.
//
if(HWREGBITW(&g_ulFlags, FLAG_RXPKT))
{
//
// Clear the Rx Packet interrupt flag.
//
HWREGBITW(&g_ulFlags, FLAG_RXPKT) = 0;
//
// Run the Luminary lwIP system tick, but with no time, to indicate
// an RX or TX packet has occurred.
//
lwip_tick(0);
//
// Enable Ethernet RX Packet Interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
}
//
// Check if a TX Packet was received.
//
if(HWREGBITW(&g_ulFlags, FLAG_TXPKT))
{
//
// Clear the Rx Packet interrupt flag.
//
HWREGBITW(&g_ulFlags, FLAG_TXPKT) = 0;
//
// Run the Luminary lwIP system tick, but with no time, to indicate
// an RX or TX packet has occurred.
//
lwip_tick(0);
//
// Enable Ethernet RX Packet Interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_TX);
}
}
}
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