ramtms470r1a256.mac
来自「最新版IAR FOR ARM(EWARM)5.11中的代码例子」· MAC 代码 · 共 70 行
MAC
70 行
// -----------------------------------------------------------------------
// This file contains the flash set up configuration for the TMS470R1A256.
//
//
//
// Revision : 0.01 JM 9/14/05
//
//-------------------------------------------------------------------------
SetupRAM()
{
__message "Executing memory setup macro A256 RAM \n";
// Disable reset at illegal address and access violation to
// avoid resetting the CPU when debugging.
__writeMemory32(0x00004007, 0xffffffe0, "Memory"); // SYSECR
/* activate Flash at 0x04000000 256k that is connected to memory select 0 */
__writeMemory32(0x00000090, 0xfffffe04, "Memory"); // MFBALR0 256K
__writeMemory32(0x00000040, 0xfffffe00, "Memory"); // MFBAHR0
/* activate Flash at 0x00000000 0k that is connected to memory select 1 */
__writeMemory32(0x00000000, 0xfffffe08, "Memory"); // MFBALR1
__writeMemory32(0x00000000, 0xfffffe0c, "Memory"); // MFBAHR1
/* activate RAM at 0x00000000 8k that is connected to memory select 2 */
__writeMemory32( 0x00000000, 0xfffffe10, "Memory" ) ; // MFBAHR2
__writeMemory32( 0x00000040, 0xfffffe14, "Memory" ) ; // MFBALR2 8K
/* activate RAM at 0x00000000 0k that is connected to memory select 3 */
__writeMemory32( 0x00000000, 0xfffffe18, "Memory" ) ; // MFBAHR3
__writeMemory32( 0x00002030, 0xfffffe1c, "Memory" ) ; // MFBALR3 0K
// HET RAM static memory control register, use 7 wait states and
// 32-bit access
__writeMemory32(0x00000072, 0xFFFFFD04, "Memory"); // SMCR1
// Map 1k HET RAM connected to memory select 4 at 0x00800000, size 2k
__writeMemory32(0x00000080, 0xfffffe20, "Memory"); // MFBAHR4
__writeMemory32(0x00000020, 0xfffffe24, "Memory"); // MFBALR4
// Trailing wait states controlled by TWS bits, use write buffer for
// expansion bus access
__writeMemory32(0x00000003, 0xFFFFFD2C, "Memory"); // WCR0
// Map 256k flash connected to memory select 0 at 0x00400000, size 256k
// and activate new mapping by writing 1 to MFBALR0.
__writeMemory32(0x00000190, 0xfffffe04, "Memory"); // MFBALR0
__writeMemory32( 0x0000000b, 0xffffffdc, "Memory" ) ; // GCR SYSCLK *4 and /4 = SYSCLK /1
}
execUserPreload()
{
SetupRAM();
}
execUserReset()
{
SetupRAM();
}
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