app_uplat7d.c
来自「最新版IAR FOR ARM（EWARM）5.11中的代码例子」· C语言 代码 · 共 1,435 行 · 第 1/4 页
C
1,435 行
return rtnVal;
}
/* Set DMAC-A for device type. */
dmac_param.device = DMAC_A;
/* selecting channel */
dmac_param.channel[DMAC_A_CHANNEL_0] = DMAC_A_CHANNEL_USED;
dmac_param.channel[DMAC_A_CHANNEL_1] = DMAC_A_CHANNEL_USED;
dmac_param.channel[DMAC_A_CHANNEL_2] = DMAC_A_CHANNEL_USED;
dmac_param.channel[DMAC_A_CHANNEL_3] = DMAC_A_CHANNEL_USED;
/* priority of channel */
dmac_param.channel_priority = DMAMODA_PRI_APP;
/* DMA request mode */
dmac_param.dma_req_mode[DMAC_A_CHANNEL_0] = DMACTMODA0_ARQ_APP;
dmac_param.dma_req_mode[DMAC_A_CHANNEL_1] = DMACTMODA1_ARQ_APP;
dmac_param.dma_req_mode[DMAC_A_CHANNEL_2] = DMACTMODA2_ARQ_APP;
dmac_param.dma_req_mode[DMAC_A_CHANNEL_3] = DMACTMODA3_ARQ_APP;
/* data transmitting size */
dmac_param.data_size[DMAC_A_CHANNEL_0] = DMACTMODA0_TSIZ_APP;
dmac_param.data_size[DMAC_A_CHANNEL_1] = DMACTMODA1_TSIZ_APP;
dmac_param.data_size[DMAC_A_CHANNEL_2] = DMACTMODA2_TSIZ_APP;
dmac_param.data_size[DMAC_A_CHANNEL_3] = DMACTMODA3_TSIZ_APP;
/* source address */
dmac_param.src_address[DMAC_A_CHANNEL_0] = DMACSADA0_0;
dmac_param.src_address[DMAC_A_CHANNEL_1] = DMACSADA1_1;
dmac_param.src_address[DMAC_A_CHANNEL_2] = DMACSADA2_2;
dmac_param.src_address[DMAC_A_CHANNEL_3] = DMACSADA3_3;
/* source device type */
dmac_param.src_dev_type[DMAC_A_CHANNEL_0] = DMACTMODA0_SDP_APP;
dmac_param.src_dev_type[DMAC_A_CHANNEL_1] = DMACTMODA1_SDP_APP;
dmac_param.src_dev_type[DMAC_A_CHANNEL_2] = DMACTMODA2_SDP_APP;
dmac_param.src_dev_type[DMAC_A_CHANNEL_3] = DMACTMODA3_SDP_APP;
/* destination address */
dmac_param.dst_address[DMAC_A_CHANNEL_0] = DMACDADA0_0;
dmac_param.dst_address[DMAC_A_CHANNEL_1] = DMACDADA1_1;
dmac_param.dst_address[DMAC_A_CHANNEL_2] = DMACDADA2_2;
dmac_param.dst_address[DMAC_A_CHANNEL_3] = DMACDADA3_3;
/* destination device type */
dmac_param.dst_dev_type[DMAC_A_CHANNEL_0] = DMACTMODA0_DDP_APP;
dmac_param.dst_dev_type[DMAC_A_CHANNEL_1] = DMACTMODA1_DDP_APP;
dmac_param.dst_dev_type[DMAC_A_CHANNEL_2] = DMACTMODA2_DDP_APP;
dmac_param.dst_dev_type[DMAC_A_CHANNEL_3] = DMACTMODA3_DDP_APP;
/* transmit times */
dmac_param.trans_times[DMAC_A_CHANNEL_0] = DMACSIZA0_0;
dmac_param.trans_times[DMAC_A_CHANNEL_1] = DMACSIZA1_1;
dmac_param.trans_times[DMAC_A_CHANNEL_2] = DMACSIZA2_2;
dmac_param.trans_times[DMAC_A_CHANNEL_3] = DMACSIZA3_3;
/* bus request mode */
dmac_param.bus_req_mode[DMAC_A_CHANNEL_0] = DMACTMODA0_BRQ_APP;
dmac_param.bus_req_mode[DMAC_A_CHANNEL_1] = DMACTMODA1_BRQ_APP;
dmac_param.bus_req_mode[DMAC_A_CHANNEL_2] = DMACTMODA2_BRQ_APP;
dmac_param.bus_req_mode[DMAC_A_CHANNEL_3] = DMACTMODA3_BRQ_APP;
/* mask */
dmac_param.channel_msk[DMAC_A_CHANNEL_0] = DMACMSKA0_MSK;
dmac_param.channel_msk[DMAC_A_CHANNEL_1] = DMACMSKA1_MSK;
dmac_param.channel_msk[DMAC_A_CHANNEL_2] = DMACMSKA2_MSK;
dmac_param.channel_msk[DMAC_A_CHANNEL_3] = DMACMSKA3_MSK;
/* Initailize DMAC. */
handle_dmac = smpDrv_open(DRVNO_DMAC, (uint32_t)(&dmac_param));
if (handle_dmac == HANDLE_ID_1) {
/* Start DMAC. */
rtnVal = smpDrv_ioctl(DRVNO_DMAC,
UPLAT_7D_HAL_DMAC_FOWARD,
(uint32_t)(&dmac_param), handle_dmac);
if (rtnVal == OK) {
/* Read DMAC status. */
rtnVal = smpDrv_ioctl(DRVNO_DMAC,
UPLAT_7D_HAL_DMAC_STATUS,
(uint32_t)(&dmac_status), handle_dmac);
if (rtnVal == OK) {
/* Get DMAC-A error status. */
if (error == NO_ERR) {
/* Channel 0 error. */
if ((dmac_status & DMAINTA_ISTA0) == DMAINTA_ISTA0) {
/* Write cycle error. */
if ((dmac_status & DMAINTA_ISTP0) == DMAINTA_ISTP0) {
error = WRITE_ERR;
}
/* Read cycle error. */
else {
error = READ_ERR;
}
}
}
if (error == NO_ERR) {
/* Channel 1 error. */
if ((dmac_status & DMAINTA_ISTA1) == DMAINTA_ISTA1) {
/* Write cycle error. */
if ((dmac_status & DMAINTA_ISTP1) == DMAINTA_ISTP1) {
error = WRITE_ERR;
}
/* Read cycle error. */
else {
error = READ_ERR;
}
}
}
if (error == NO_ERR) {
/* Channel 2 error. */
if ((dmac_status & DMAINTA_ISTA2) == DMAINTA_ISTA2) {
/* Write cycle error. */
if ((dmac_status & DMAINTA_ISTP2) == DMAINTA_ISTP2) {
error = WRITE_ERR;
}
/* Read cycle error. */
else {
error = READ_ERR;
}
}
}
if (error == NO_ERR) {
/* Channel 3 error. */
if ((dmac_status & DMAINTA_ISTA3) == DMAINTA_ISTA3) {
/* Write cycle error. */
if ((dmac_status & DMAINTA_ISTP3) == DMAINTA_ISTP3) {
error = WRITE_ERR;
}
/* Read cycle error. */
else {
error = READ_ERR;
}
}
}
switch (error) {
case NO_ERR: /* No Error */
debug_msg(_7_LED1_NUM_0, NULL);
break;
case READ_ERR: /* Read cycle error */
debug_msg(_7_LED1_NUM_1, NULL);
break;
case WRITE_ERR: /* Erite cycle error */
debug_msg(_7_LED1_NUM_2, NULL);
break;
default:
break;
}
}
}
}
return rtnVal;
}
/************************************************************************/
/* */
/* Function Name : uPLATsmpAP_PM */
/* Input : Noting */
/* Output : OK(1) */
/* ERROR(-1) */
/* */
/* Note : Sample program of Power Managiment. */
/* */
/************************************************************************/
int16_t uPLATsmpAP_PM( void )
{
int16_t rtnVal = OK;
int16_t handle_sio = HANDLE_ID_INIT;
int16_t handle_fiq = HANDLE_ID_INIT;
int16_t handle_irq = HANDLE_ID_INIT;
int16_t handle_pm = HANDLE_ID_INIT;
uint32_t div_clock = AP_DIV_CLK1; /* DIV Clock 1/1 */
uint32_t apb_clock = AP_AHB_CLK2; /* APB Clock 1/2 */
uPLAT_InterruptParam int_param;
struct uPLAT_SioParam sio_trans_param;
int8_t rev_data[128];
smpDrvInitPeripheral init_peripheral;
/* Initialize peripheral. */
init_peripheral.init_xbus.rombw = BWC_ROMBW_16;
init_peripheral.init_xbus.srambw = BWC_SRAMBW_16;
init_peripheral.init_xbus.iobw = BWC_IOBW_16;
init_peripheral.init_xbus.romtype = ROMAC_ROMTYPE_0;
init_peripheral.init_xbus.rombrst = ROMAC_ROMBRST_off;
init_peripheral.init_xbus.sramtype = RAMAC_RAMTYPE_1;
init_peripheral.init_xbus.srambrst = RAMAC_RAMBRST_off;
init_peripheral.init_xbus.iotype = IOAC_IOTYPE_2;
init_peripheral.init_xbus.sdrambw = DBWC_DBDRAM16;
init_peripheral.init_xbus.standby = FALSE;
init_peripheral.cache_mode = CACHE_WRITE_BACK;
init_peripheral.init_port.port_sel1 = PORT_CR1_INIT_VALUE;
init_peripheral.init_port.port_sel2 = PORT_CR2_INIT_VALUE;
init_peripheral.init_port.port_sel3 = PORT_CR3_INIT_VALUE;
init_peripheral.init_port.port_sel4 = PORT_CR4_INIT_VALUE;
rtnVal = smpDrv_reset(&init_peripheral);
if (rtnVal == OK) {
/* Used SIO */
sio_trans_param.baudrate = BPS_115200; /* 115200bps */
sio_trans_param.parity = NON_PARITY; /* Non parity */
sio_trans_param.data_len = LENGTH_8BIT; /* 8bit */
sio_trans_param.stop_bit = STOP_1BIT; /* 1 stop bit */
handle_sio = smpDrv_open(DRVNO_SIO, (uint32_t)(&sio_trans_param));
/* Used FIQ */
if (handle_sio == HANDLE_ID_1) {
int_param.primary = INT_FIQ;
int_param.callback = AP_FIQ_handler;
handle_fiq = smpDrv_open(DRVNO_INTFIQ, (uint32_t)(&int_param));
}
/* Used EXINT1 */
if (handle_sio == HANDLE_ID_1) {
int_param.primary = INT_EXINT1;
int_param.callback = AP_EXINT1_handler;
int_param.level = EXILCB_ILC34 & INT_LV1;
handle_irq = smpDrv_open(DRVNO_INTEXINT, (uint32_t)(&int_param));
}
/* Used PM */
if (handle_sio == HANDLE_ID_1) {
handle_pm = smpDrv_open(DRVNO_PM, (uint32_t)(&int_param));
}
}
PM_DIV_APB_CLK_LED_DISPLY((int32_t)div_clock, (int32_t)apb_clock);
AP_FIQ_Flag = 0;
while(AP_FIQ_Flag == 0){
rtnVal = smpDrv_read(DRVNO_SIO, &rev_data[0], 1, handle_sio);
if(rtnVal == OK){
rtnVal = smpDrv_write(DRVNO_SIO, &rev_data[0], 1, handle_sio);
}
if(rtnVal == OK){
switch(rev_data[0]){
case 'H':
case 'h':
debug_msg(_7_LED1_L1|_7_LED1_L2|_7_LED1_L4|_7_LED1_L5|_7_LED1_L6, NULL); /* 7 segment LED : "H" */
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP, NULL, handle_pm);
break;
case 'S':
case 's':
debug_msg(_7_LED1_L0|_7_LED1_L2|_7_LED1_L3|_7_LED1_L5|_7_LED1_L6, NULL); /* 7 segment LED : "S" */
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_SET_STOP, NULL, handle_pm);
break;
case '+':
if(div_clock != AP_DIV_CLK1){
div_clock--;
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_CHANGE_DIVCLK, div_clock, handle_pm);
}
break;
case '-':
if(div_clock < AP_DIV_CLK32){
div_clock++;
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_CHANGE_DIVCLK, div_clock, handle_pm);
}
break;
case '[':
if(apb_clock != AP_AHB_CLK2){
apb_clock--;
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_CHANGE_APBCLK, apb_clock, handle_pm);
}
break;
case ']':
if(apb_clock < AP_AHB_CLK8){
apb_clock++;
rtnVal = smpDrv_ioctl(DRVNO_PM, UPLAT_7D_HAL_PM_CHANGE_APBCLK, apb_clock, handle_pm);
}
break;
default:
break;
}
PM_DIV_APB_CLK_LED_DISPLY((int32_t)div_clock, (int32_t)apb_clock);
}
}
smpDrv_close(DRVNO_PM, handle_pm); /* PM Close */
smpDrv_close(DRVNO_INTFIQ, handle_fiq); /* FIQ Close */
smpDrv_close(DRVNO_INTEXINT, handle_irq); /* EXINT1 Close */
smpDrv_close(DRVNO_SIO, handle_sio); /* SIO Close */
debug_msg(_7_LED1_OFF, NULL); /* 7 segment LED : ALL OFF */
return rtnVal;
}
/************************************************************************/
/* */
/* Function Name : PM_DIV_APB_CLK_LED_DISPLY */
/* Input : div_clock */
/* : 0: DIV_CLK1 */
/* : 1: DIV_CLK2 */
/* : 2: DIV_CLK4 */
/* : 3: DIV_CLK8 */
/* : 4: DIV_CLK16 */
/* : 5: DIV_CLK32 */
/* */
/* : div_clock */
/* : 0: AHB_CLK2 */
/* : 1: AHB_CLK4 */
/* : 2: AHB_CLK8 */
/* Output : Noting */
/* */
/* Note : Display of DIV/APB Clock. */
/* */
/************************************************************************/
void PM_DIV_APB_CLK_LED_DISPLY( int32_t div_clock, int32_t apb_clock)
{
uint16_t display_info = _7_LED1_OFF;
switch(div_clock){
case AP_DIV_CLK1:
display_info |= _7_LED1_L5; /* 7 segment LED : L5 ON */
break;
case AP_DIV_CLK2:
display_info |= _7_LED1_L0; /* 7 segment LED : L0 ON */
break;
case AP_DIV_CLK4:
display_info |= (_7_LED1_L0|_7_LED1_L5); /* 7 segment LED : L0,L5 ON */
break;
case AP_DIV_CLK8:
display_info |= _7_LED1_L1; /* 7 segment LED : L1 ON */
break;
case AP_DIV_CLK16:
display_info |= (_7_LED1_L1|_7_LED1_L5); /* 7 segment LED : L1,L5 ON */
break;
case AP_DIV_CLK32:
display_info |= (_7_LED1_L0|_7_LED1_L1); /* 7 segment LED : L0,L1 ON */
break;
default:
display_info = _7_LED1_OFF; /* 7 segment LED : ALL OFF */
break;
}
switch(apb_clock){
case AP_AHB_CLK2:
display_info |= _7_LED1_L3; /* 7 segment LED : L3 ON */
break;
case AP_AHB_CLK4:
display_info |= (_7_LED1_L3|_7_LED1_L4); /* 7 segment LED : L3,L4 ON */
break;
case AP_AHB_CLK8:
display_info |= _7_LED1_L2; /* 7 segment LED : L2 ON */
break;
default:
display_info = _7_LED1_OFF; /* 7 segment LED : ALL OFF */
break;
}
debug_msg(display_info, NULL); /* Display 7 segment LED */
}
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