hal_state.c

最新版IAR FOR ARM（EWARM）5.11中的代码例子

        else {
            hal_status[UPLAT_7D_HAL_UART_READ_STATUS] = START;
        }
        break;
    case UPLAT7D_HAL_UART_INIT_END:
        hal_status[UPLAT7D_HAL_UART_INIT] = END;
        break;
    case UPLAT7D_HAL_UART_RX_DATA_END:
        hal_status[UPLAT7D_HAL_UART_RX_DATA] = END;
        break;
    case UPLAT_7D_HAL_UART_TX_DATA_END:
        hal_status[UPLAT_7D_HAL_UART_TX_DATA] = END;
        break;
    case UPLAT_7D_HAL_UART_READ_STATUS_END:
        hal_status[UPLAT_7D_HAL_UART_READ_STATUS] = END;
        break;

    /* pm */
    case UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP:
        if (hal_status[UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_STOP:
        if (hal_status[UPLAT_7D_HAL_PM_SET_STOP] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_STOP] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_CHANGE_DIVCLK:
        if (hal_status[UPLAT_7D_HAL_PM_CHANGE_DIVCLK] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_CHANGE_DIVCLK] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_CHANGE_APBCLK:
        if (hal_status[UPLAT_7D_HAL_PM_CHANGE_APBCLK] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_CHANGE_APBCLK] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP_END:
        hal_status[UPLAT_7D_HAL_PM_SET_HALT_CPUGROUP] = END;
        break;
    case UPLAT_7D_HAL_PM_SET_STOP_END:
        hal_status[UPLAT_7D_HAL_PM_SET_STOP] = END;
        break;
    case UPLAT_7D_HAL_PM_CHANGE_DIVCLK_END:
        hal_status[UPLAT_7D_HAL_PM_CHANGE_DIVCLK] = END;
        break;
    case UPLAT_7D_HAL_PM_CHANGE_APBCLK_END:
        hal_status[UPLAT_7D_HAL_PM_CHANGE_APBCLK] = END;
        break;

    /* pm(standby) */
    case UPLAT_7D_HAL_PM_SET_STANDBY_A:
        if (hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_A] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_A] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_STANDBY_B:
        if (hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_B] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_B] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_STANDBY_C:
        if (hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_C] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_C] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_RET_STANDBY_A:
        if (hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_A] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_A] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_RET_STANDBY_B:
        if (hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_B] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_B] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_STANDBY_DRAM_CBR_REF:
        if (hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_CBR_REF] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_CBR_REF] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_STANDBY_DRAM_SELF_REF:
        if (hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_SELF_REF] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_SELF_REF] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_STANDBY_CACHE_RETWRITE:
        if (hal_status[UPLAT_7D_HAL_PM_STANDBY_CACHE_RETWRITE] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_PM_STANDBY_CACHE_RETWRITE] = START;
        }
        break;
    case UPLAT_7D_HAL_PM_SET_STANDBY_A_END:
        hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_A] = END;
        break;
    case UPLAT_7D_HAL_PM_SET_STANDBY_B_END:
        hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_B] = END;
        break;
    case UPLAT_7D_HAL_PM_SET_STANDBY_C_END:
        hal_status[UPLAT_7D_HAL_PM_SET_STANDBY_C] = END;
        break;
    case UPLAT_7D_HAL_PM_SET_RET_STANDBY_A_END:
        hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_A] = END;
        break;
    case UPLAT_7D_HAL_PM_SET_RET_STANDBY_B_END:
        hal_status[UPLAT_7D_HAL_PM_SET_RET_STANDBY_B] = END;
        break;
    case UPLAT_7D_HAL_PM_STANDBY_DRAM_CBR_REF_END:
        hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_CBR_REF] = END;
        break;
    case UPLAT_7D_HAL_PM_STANDBY_DRAM_SELF_REF_END:
        hal_status[UPLAT_7D_HAL_PM_STANDBY_DRAM_SELF_REF] = END;
        break;
    case UPLAT_7D_HAL_PM_STANDBY_CACHE_RETWRITE_END:
        hal_status[UPLAT_7D_HAL_PM_STANDBY_CACHE_RETWRITE] = END;
        break;

    /* xbus */
    case UPLAT_7D_HAL_XBUS_INIT_MEM:
        if (hal_status[UPLAT_7D_HAL_XBUS_INIT_MEM] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_XBUS_INIT_MEM] = START;
        }
        break;
    case UPLAT_7D_HAL_XBUS_INIT_MEM_END:
        hal_status[UPLAT_7D_HAL_XBUS_INIT_MEM] = END;
        break;

    /* remap */
    case UPLAT_7D_HAL_REMAP_SET_RAM:
        if (hal_status[UPLAT_7D_HAL_REMAP_SET_RAM] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_REMAP_SET_RAM] = START;
        }
        break;
    case UPLAT_7D_HAL_REMAP_SET_FUNCTION:
        if (hal_status[UPLAT_7D_HAL_REMAP_SET_FUNCTION] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_REMAP_SET_FUNCTION] = START;
        }
        break;
    case UPLAT_7D_HAL_REMAP_SET_RAM_END:
        hal_status[UPLAT_7D_HAL_REMAP_SET_RAM] = END;
        break;
    case UPLAT_7D_HAL_REMAP_SET_FUNCTION_END:
        hal_status[UPLAT_7D_HAL_REMAP_SET_FUNCTION] = END;
        break;

    /* cache */
    case UPLAT_7D_HAL_CACHE_INIT:
        if (hal_status[UPLAT_7D_HAL_CACHE_INIT] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[UPLAT_7D_HAL_CACHE_INIT] = START;
        }
        break;
    case UPLAT_7D_HAL_CACHE_INIT_END:
        hal_status[UPLAT_7D_HAL_CACHE_INIT] = END;
        break;

    /* iccc */
    case ML675050_HAL_ICCC_INIT:
        if (hal_status[ML675050_HAL_ICCC_INIT] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_INIT] = START;
        }
        break;
    case ML675050_HAL_ICCC_SET_ACTIVATION:
        if (hal_status[ML675050_HAL_ICCC_SET_ACTIVATION] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_SET_ACTIVATION] = START;
        }
        break;
    case ML675050_HAL_ICCC_SET_RS:
        if (hal_status[ML675050_HAL_ICCC_SET_RS] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_SET_RS] = START;
        }
        break;
    case ML675050_HAL_ICCC_RX_DATA:
        if (hal_status[ML675050_HAL_ICCC_RX_DATA] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_RX_DATA] = START;
        }
        break;
    case ML675050_HAL_ICCC_TX_DATA:
        if (hal_status[ML675050_HAL_ICCC_TX_DATA] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_TX_DATA] = START;
        }
        break;
    case ML675050_HAL_ICCC_READ_STATUS:
        if (hal_status[ML675050_HAL_ICCC_READ_STATUS] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_ICCC_READ_STATUS] = START;
        }
        break;
    case ML675050_HAL_ICCC_INIT_END:
        hal_status[ML675050_HAL_ICCC_INIT] = END;
        break;
    case ML675050_HAL_ICCC_SET_ACTIVATION_END:
        hal_status[ML675050_HAL_ICCC_SET_ACTIVATION] = END;
        break;
    case ML675050_HAL_ICCC_SET_RS_END:
        hal_status[ML675050_HAL_ICCC_SET_RS] = END;
        break;
    case ML675050_HAL_ICCC_RX_DATA_END:
        hal_status[ML675050_HAL_ICCC_RX_DATA] = END;
        break;
    case ML675050_HAL_ICCC_TX_DATA_END:
        hal_status[ML675050_HAL_ICCC_TX_DATA] = END;
        break;
    case ML675050_HAL_ICCC_READ_STATUS_END:
        hal_status[ML675050_HAL_ICCC_READ_STATUS] = END;
        break;

    /* lcdc */
    case ML675050_HAL_LCDC_INIT:
        if (hal_status[ML675050_HAL_LCDC_INIT] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_LCDC_INIT] = START;
        }
        break;
    case ML675050_HAL_LCDC_SET_DISPALY_MODE:
        if (hal_status[ML675050_HAL_LCDC_SET_DISPALY_MODE] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_LCDC_SET_DISPALY_MODE] = START;
        }
        break;
    case ML675050_HAL_LCDC_SET_OUTPUT:
        if (hal_status[ML675050_HAL_LCDC_SET_OUTPUT] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_LCDC_SET_OUTPUT] = START;
        }
        break;
    case ML675050_HAL_LCDC_WRITE_VRAM:
        if (hal_status[ML675050_HAL_LCDC_WRITE_VRAM] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_LCDC_WRITE_VRAM] = START;
        }
        break;
    case ML675050_HAL_LCDC_READ_STATUS:
        if (hal_status[ML675050_HAL_LCDC_READ_STATUS] == START) {
            rtnVal = HAL_DOUBLE_ERROR;
        }
        else {
            hal_status[ML675050_HAL_LCDC_READ_STATUS] = START;
        }
        break;
    case ML675050_HAL_LCDC_INIT_END:
        hal_status[ML675050_HAL_LCDC_INIT] = END;
        break;
    case ML675050_HAL_LCDC_SET_DISPALY_MODE_END:
        hal_status[ML675050_HAL_LCDC_SET_DISPALY_MODE] = END;
        break;
    case ML675050_HAL_LCDC_SET_OUTPUT_END:
        hal_status[ML675050_HAL_LCDC_SET_OUTPUT] = END;