at91sam9263_ccfg.h
来自「最新版IAR FOR ARM(EWARM)5.11中的代码例子」· C头文件 代码 · 共 90 行
H
90 行
/* linux/include/asm-arm/arch-at91sam9263/at91sam9263_ccfg.h
*
* Hardware definition for the ccfg peripheral in the ATMEL at91sam9263 processor
*
* Generated 12/07/2006 (13:13:46) AT91 SW Application Group from V
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __AT91SAM9263_CCFG_H
#define __AT91SAM9263_CCFG_H
/* -------------------------------------------------------- */
/* CCFG ID definitions for AT91SAM9263 */
/* -------------------------------------------------------- */
/* -------------------------------------------------------- */
/* CCFG Base Address definitions for AT91SAM9263 */
/* -------------------------------------------------------- */
#define AT91C_BASE_CCFG 0xFFFFED10 /**< CCFG base address */
/* -------------------------------------------------------- */
/* PIO definition for CCFG hardware peripheral */
/* -------------------------------------------------------- */
/* -------------------------------------------------------- */
/* Register offset definition for CCFG hardware peripheral */
/* -------------------------------------------------------- */
#define CCFG_TCMR (0x0004) /**< TCM configuration */
#define CCFG_EBI0CSA (0x0010) /**< EBI0 Chip Select Assignement Register */
#define CCFG_EBI1CSA (0x0014) /**< EBI1 Chip Select Assignement Register */
#define CCFG_MATRIXVERSION (0x00EC) /**< Version Register */
/* -------------------------------------------------------- */
/* Bitfields definition for CCFG hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register CCFG_TCMR */
#define AT91C_CCFG_ITCM_SIZE (0xF << 0 ) /**< (CCFG) Size of ITCM enabled memory block */
#define AT91C_CCFG_ITCM_SIZE_0KB 0x0 /**< (CCFG) 0 KB (No ITCM Memory) */
#define AT91C_CCFG_ITCM_SIZE_16KB 0x5 /**< (CCFG) 16 KB */
#define AT91C_CCFG_ITCM_SIZE_32KB 0x6 /**< (CCFG) 32 KB */
#define AT91C_CCFG_DTCM_SIZE (0xF << 4 ) /**< (CCFG) Size of DTCM enabled memory block */
#define AT91C_CCFG_DTCM_SIZE_0KB (0x0 << 4) /**< (CCFG) 0 KB (No DTCM Memory) */
#define AT91C_CCFG_DTCM_SIZE_16KB (0x5 << 4) /**< (CCFG) 16 KB */
#define AT91C_CCFG_DTCM_SIZE_32KB (0x6 << 4) /**< (CCFG) 32 KB */
#define AT91C_CCFG_RM (0xF << 8 ) /**< (CCFG) Read Margin registers */
/* --- Register CCFG_EBI0CSA */
#define AT91C_EBI_CS1A (0x1 << 1 ) /**< (CCFG) Chip Select 1 Assignment */
#define AT91C_EBI_CS1A_SMC (0x0 << 1) /**< (CCFG) Chip Select 1 is assigned to the Static Memory Controller. */
#define AT91C_EBI_CS1A_SDRAMC (0x1 << 1) /**< (CCFG) Chip Select 1 is assigned to the SDRAM Controller. */
#define AT91C_EBI_CS3A (0x1 << 3 ) /**< (CCFG) Chip Select 3 Assignment */
#define AT91C_EBI_CS3A_SMC (0x0 << 3) /**< (CCFG) Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behaves as defined by the SMC. */
#define AT91C_EBI_CS3A_SM (0x1 << 3) /**< (CCFG) Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated. */
#define AT91C_EBI_CS4A (0x1 << 4 ) /**< (CCFG) Chip Select 4 Assignment */
#define AT91C_EBI_CS4A_SMC (0x0 << 4) /**< (CCFG) Chip Select 4 is only assigned to the Static Memory Controller and NCS4 behaves as defined by the SMC. */
#define AT91C_EBI_CS4A_CF (0x1 << 4) /**< (CCFG) Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic (first slot) is activated. */
#define AT91C_EBI_CS5A (0x1 << 5 ) /**< (CCFG) Chip Select 5 Assignment */
#define AT91C_EBI_CS5A_SMC (0x0 << 5) /**< (CCFG) Chip Select 5 is only assigned to the Static Memory Controller and NCS5 behaves as defined by the SMC */
#define AT91C_EBI_CS5A_CF (0x1 << 5) /**< (CCFG) Chip Select 5 is assigned to the Static Memory Controller and the CompactFlash Logic (second slot) is activated. */
#define AT91C_EBI_DBPUC (0x1 << 8 ) /**< (CCFG) Data Bus Pull-up Configuration */
/* --- Register CCFG_EBI1CSA */
#define AT91C_EBI_CS1A (0x1 << 1 ) /**< (CCFG) Chip Select 1 Assignment */
#define AT91C_EBI_CS1A_SMC (0x0 << 1) /**< (CCFG) Chip Select 1 is assigned to the Static Memory Controller. */
#define AT91C_EBI_CS1A_SDRAMC (0x1 << 1) /**< (CCFG) Chip Select 1 is assigned to the SDRAM Controller. */
#define AT91C_EBI_CS2A (0x1 << 3 ) /**< (CCFG) EBI1 Chip Select 2 Assignment */
#define AT91C_EBI_CS2A_SMC (0x0 << 3) /**< (CCFG) Chip Select 2 is assigned to the Static Memory Controller. */
#define AT91C_EBI_CS2A_SM (0x1 << 3) /**< (CCFG) Chip Select 2 is assigned to the Static Memory Controller and the SmartMedia Logic is activated. */
#define AT91C_EBI_DBPUC (0x1 << 8 ) /**< (CCFG) Data Bus Pull-up Configuration */
#endif /* __AT91SAM9263_CCFG_H */
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?