at91sam9263_tbox.h

来自「最新版IAR FOR ARM（EWARM）5.11中的代码例子」· C头文件 代码 · 共 99 行

/* linux/include/asm-arm/arch-at91sam9263/at91sam9263_tbox.h
 * 
 * Hardware definition for the tbox peripheral in the ATMEL at91sam9263 processor
 * 
 * Generated  12/07/2006 (13:13:46) AT91 SW Application Group from TBOX_XXXX V1.15
 * 
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 * 
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */


#ifndef __AT91SAM9263_TBOX_H
#define __AT91SAM9263_TBOX_H

/* -------------------------------------------------------- */
/* TBOX ID definitions for  AT91SAM9263           */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* TBOX Base Address definitions for  AT91SAM9263   */
/* -------------------------------------------------------- */
#define AT91C_BASE_TBOX      	0x70000000 /**< TBOX base address */

/* -------------------------------------------------------- */
/* PIO definition for TBOX hardware peripheral */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* Register offset definition for TBOX hardware peripheral */
/* -------------------------------------------------------- */
#define TBOX_SHMCTRL 	(0x0000) 	/**< SHM Probe Control: 0-> shm probe stopped, 1: shm probe started */
#define TBOX_DMAEXTREQ 	(0x0810) 	/**< DMA External request lines 3 to 0 */
#define TBOX_PIOAPUN 	(0x0900) 	/**< Spy on PIO PUN inputs */
#define TBOX_PIOBPUN 	(0x0904) 	/**< Spy on PIO PUN inputs */
#define TBOX_PIOCPUN 	(0x0908) 	/**< Spy on PIO PUN inputs */
#define TBOX_PIODPUN 	(0x090C) 	/**< Spy on PIO PUN inputs */
#define TBOX_PIOEPUN 	(0x0910) 	/**< Spy on PIO PUN inputs */
#define TBOX_PIOAENABLEFORCE 	(0x0914) 	/**< If each bit is 1, the corresponding bit of PIOA is controlled by TBOX_PIOAFORCEVALUE */
#define TBOX_PIOAFORCEVALUE 	(0x0918) 	/**< Value to force on PIOA when bits TBOX_PIOAENABLEFORCE are 1 */
#define TBOX_PIOBENABLEFORCE 	(0x091C) 	/**< If each bit is 1, the corresponding bit of PIOB is controlled by TBOX_PIOBFORCEVALUE */
#define TBOX_PIOBFORCEVALUE 	(0x0920) 	/**< Value to force on PIOA when bits TBOX_PIOBENABLEFORCE are 1 */
#define TBOX_PIOCENABLEFORCE 	(0x0924) 	/**< If each bit is 1, the corresponding bit of PIOC is controlled by TBOX_PIOCFORCEVALUE */
#define TBOX_PIOCFORCEVALUE 	(0x0928) 	/**< Value to force on PIOA when bits TBOX_PIOCENABLEFORCE are 1 */
#define TBOX_PIODENABLEFORCE 	(0x092C) 	/**< If each bit is 1, the corresponding bit of PIOD is controlled by TBOX_PIODFORCEVALUE */
#define TBOX_PIODFORCEVALUE 	(0x0930) 	/**< Value to force on PIOA when bits TBOX_PIODENABLEFORCE are 1 */
#define TBOX_PIOEENABLEFORCE 	(0x0934) 	/**< If each bit is 1, the corresponding bit of PIOE is controlled by TBOX_PIOEFORCEVALUE */
#define TBOX_PIOEFORCEVALUE 	(0x0938) 	/**< Value to force on PIOA when bits TBOX_PIOEENABLEFORCE are 1 */
#define TBOX_PIOA 	(0x093C) 	/**< Value Of PIOA */
#define TBOX_PIOB 	(0x0940) 	/**< Value Of PIOB */
#define TBOX_PIOC 	(0x0944) 	/**< Value Of PIOC */
#define TBOX_PIOD 	(0x0948) 	/**< Value Of PIOD */
#define TBOX_PIOE 	(0x094C) 	/**< Value Of PIOE */
#define TBOX_AC97START 	(0x0A00) 	/**< Start of AC97 test: swith PIO mux to connect PIOs to audio codec model. */
#define TBOX_PWMSTART 	(0x0A04) 	/**< Start of PWM test: Start to count edges on PWM IOs */
#define TBOX_PWM1 	(0x0A08) 	/**< PWM1[4:0]=nb pulses on pb7, PWM1[9:5]=nb pulses on pc28, PWM1[20:16]=nb pulses on pb8, PWM1[25:21]=nb pulses on pc3 */
#define TBOX_PWM2 	(0x0A0C) 	/**< PWM2[3:0]=nb pulses on pb27, PWM2[7:4]=nb pulses on pc29, PWM2[19:16]=nb pulses on pb29, PWM2[23:20]=nb pulses on pe10 */
#define TBOX_MAC 	(0x0A10) 	/**< MAC testbench : bit 0 = rxtrig, bit 1 = clkofftester, bit 2 = err_sig_loops */
#define TBOX_USBDEV 	(0x0A14) 	/**< USB device testbench : bit 0 = flag0, bit 1 = flag1 */
#define TBOX_KBD 	(0x0A18) 	/**< Keyboard testbench : bit 0 = keypressed; bits[7:6] = key column; bits[5:4] = key row; */
#define TBOX_STOPAPBSPY 	(0x0A1C) 	/**< When 1, no more APB SPY messages */
#define TBOX_GPSSYNCHRO 	(0x0B00) 	/**< GPS synchronization (Stimulus) */
#define TBOX_GPSRAND 	(0x0B04) 	/**< GPS random data for correlator (Stimulus - Internal Node) */
#define TBOX_GPSACQSTATUS 	(0x0B08) 	/**< GPS acquisition status (Probe - Internal Node) */
#define TBOX_GPSACQDATA 	(0x0B0C) 	/**< GPS acquisition data (Probe - Internal Node) */
#define TBOX_GPSSIGFILE 	(0x0BA0) 	/**< GPS RFIN/DRFIN driven from files/Samples_GPS.data */
#define TBOX_GPSSIGIA 	(0x0BA4) 	/**< GPS DRFIN[1:0] aka SIGI_A (Stimulus) */
#define TBOX_GPSSIGQA 	(0x0BA8) 	/**< GPS DRFIN[3:2] aka SIGQ_A (Stimulus) */
#define TBOX_GPSSIGIB 	(0x0BB0) 	/**< GPS DRFIN[5:4] aka SIGI_B (Stimulus) */
#define TBOX_GPSSIGQB 	(0x0BB4) 	/**< GPS DRFIN[7:6] aka SIGQ_B (Stimulus) */
#define TBOX_GPSDUMPRES 	(0x0BC0) 	/**< GPS Dump results and errors */

/* -------------------------------------------------------- */
/* Bitfields definition for TBOX hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register TBOX_DMAEXTREQ */
#define AT91C_TBOX_DMAEXTREQ0 (0x1 << 0 ) /**< (TBOX) DMA external request 0 */
#define AT91C_TBOX_DMAEXTREQ1 (0x1 << 1 ) /**< (TBOX) DMA external request 1 */
#define AT91C_TBOX_DMAEXTREQ2 (0x1 << 2 ) /**< (TBOX) DMA external request 2 */
#define AT91C_TBOX_DMAEXTREQ3 (0x1 << 3 ) /**< (TBOX) DMA external request 3 */

#endif /* __AT91SAM9263_TBOX_H */