hal_cfg.h

来自「最新版IAR FOR ARM（EWARM）5.11中的代码例子」· C头文件 代码 · 共 79 行

//-----------------------------------------------------------------------------
// HAL_Cfg
// Global configuration
//-----------------------------------------------------------------------------
#ifndef HAL_CFG_H
#define HAL_CFG_H

#include "hal_map.h"

//*************************************************
//REGISTER FW_CFG read only
//*************************************************
//********** Mask
#define FW_CFG_Mask  0x00FF

//********** Values
#define FW_CFG_7  0x0080
#define FW_CFG_6  0x0040
#define FW_CFG_5  0x0020
#define FW_CFG_4  0x0010
#define FW_CFG_3  0x0008
#define FW_CFG_2  0x0004
#define FW_CFG_1  0x0002
#define FW_CFG_0  0x0001
//*************************************************
//REGISTER HW_CFG
//*************************************************
//********** Mask
#define HW_CFG_Mask        0x00FC

//********** Value
#define HW_CFG_SDRAM_TYPE  0x0080
#define HW_CFG_USB_CLK_EN  0x0040
#define HW_CFG_IEEE_XP     0x0020
#define HW_CFG_ROM_BSIZE   0x0010
#define HW_CFG_JTAG_ENABLE 0x0008
#define HW_CFG_PLL_BYPASS  0x0004

//*************************************************
//REGISTER GC GLOBAL CONTROL
//*************************************************
//********** Mask
#define GC_CFG_Mask        0x0003

//********** Value
#define GC_CFG_USB_ENABLE  0x0002   //PADS remapping for USB/Shared RAM controller usage
#define GC_CFG_I2C_ENABLE  0x0001   //PADS remapping for I2C or GPIO usage
//-----------------------------------------------------------------------------

//*************************************************
//REGISTER GS GLOBAL STATUS - read only
//*************************************************
#define GS_PLL_LOCK 0x0001
//-----------------------------------------------------------------------------

//*************************************************
//REGISTER SHRAM_CTRL
//*************************************************
//********** Mask
#define SHRAM_CTRL_Mask           0x0003

//********** Value
#define SHRAM_CTRL_EM_BIST_START  0x0002
#define SHRAM_CTRL_CSN_SHRAM      0x0001
//-----------------------------------------------------------------------------

//*************************************************
//REGISTER SHRAM_STATUS read only
//*************************************************
#define SHRAM_STATUS_EM_BIST_ERROR  0x0004
#define EM_BIST_GONOGO              0x0002
#define EM_BIST_DONE                0x0001
//-----------------------------------------------------------------------------

u32 CR_PLL_Locked(void);

//-----------------------------------------------------------------------------
#endif