hal_mac.h
来自「最新版IAR FOR ARM（EWARM）5.11中的代码例子」· C头文件 代码 · 共 574 行 · 第 1/2 页
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//-----------------------------------------------------------------------------
// HAL_MAC
//-----------------------------------------------------------------------------
#ifndef HAL_MAC_H
#define HAL_MAC_H
#include "hal_map.h"
//-----------------------------------------------------------------------------
//* Defines for DMA_MAC - TX/RX DMA descriptors
//-----------------------------------------------------------------------------
#define RX_MAC_DESCR_NUM 16
#define TX_MAC_DESCR_NUM 16
//-----------------------------------------------------------------------------
//* Defines for Ethernet Frame format IEEE802.3
//-----------------------------------------------------------------------------
#define MAC_ADDR_LEN 6
#define ETHER_HEADER_LENGTH 14
#define ETHER_TYPE_LENGTH 2
#define MAC_MAX_FRAME_DATA_SZ 1500
#define MAC_MAX_FRAME_SZ 1514
//-----------------------------------------------------------------------------
//* Frame Descriptor table
//-----------------------------------------------------------------------------
typedef struct
{
u32 DmaMac_Cntl;
u32 DmaMac_Addr;
u32 DmaMac_Next;
u32 TxRx_Status;
u8 FrameBuf[MAC_MAX_FRAME_SZ];
} DmaMacDescr;
//-----------------------------------------------------------------------------
//* Ethernet Frame basic structure
//-----------------------------------------------------------------------------
typedef union
{
struct
{
u8 DstAddr[MAC_ADDR_LEN];
u8 SrcAddr[MAC_ADDR_LEN];
u16 Type; //Type or Length
u8 Data[MAC_MAX_FRAME_DATA_SZ];
} EthernetFrameBySegment;
u8 EthernetFrameByByte[MAC_MAX_FRAME_SZ];
}EthernetFrame;
//*****************************************************************************
//* *//
//* *//
//* *//
//* PHY STE100P *//
//* *//
//* *//
//* *//
//*****************************************************************************
//-----------------------------------------------------------------------------
//* Defines for the PHY controlled over MII
//-----------------------------------------------------------------------------
// Set the phy PHY_NUM according to your board settings
#define PHY_NUM 0x4
#define Phy_CtrlReg 0x00
#define Phy_Reset 0x8000
#define Phy_Loopback 0x4000
#define Phy_Speed_10Mbs 0x0000
#define Phy_Speed_100Mbs 0x2000
#define Phy_Speed_1000Mbs 0x0040
#define Phy_Speed_Msk 0x2040
#define Phy_AutoNego 0x1000
#define Phy_PowerDown 0x0800
#define Phy_Isolate 0x0400
#define Phy_AutoNegoRestart 0x0200
#define Phy_DuplexMode 0x0100
#define Phy_CollTest 0x0080
#define Phy_StatReg 0x01
#define Phy_AutoNego_Done 0x0020
#define Phy_ANADReg 0x04
#define Phy_Next_Page 0x8000
#define Phy_Remote_fault 0x4000
#define Phy_100Base_T4 0x0200
#define Phy_100Base_TX_Full 0x0100
#define Phy_100Base_TX_Half 0x0080
#define Phy_10Base_T_Full 0x0040
#define Phy_10Base_T_Half 0x0020
#define Phy_Selector 0x0001
#define Phy_ANLPAReg 0x5
#define Phy_ANEXReg 0x6
#define Phy_QPDSReg 0x11
//*****************************************************************************
//* *//
//* *//
//* *//
//* DMA MAC *//
//* *//
//* *//
//* *//
//*****************************************************************************
//-----------------------------------------------------------------------------
//* DMA_MAC Status & Control Register
//-----------------------------------------------------------------------------
//********* Masks
#define DmaMac_Stat_Msk 0xffffff03
#define DmaMac_Stat_Rst 0x4a4a0100
//********* Values
#define DmaMac_SRst 0x00000001
#define DmaMac_Loopb 0x00000002
#define DmaMac_RXBurst_16 0x00000000
#define DmaMac_RXBurst_08 0x00000010
#define DmaMac_RXBurst_04 0x00000020
#define DmaMac_RXBurst_01 0x00000030
#define DmaMac_TXBurst_16 0x00000000
#define DmaMac_TXBurst_08 0x00000040
#define DmaMac_TXBurst_04 0x00000080
#define DmaMac_TXBurst_01 0x000000C0
#define DmaMac_RevMsk 0x0000ff00
#define DmaMac_RevU 0x00000100
#define DmaMac_RxChStMsk 0x00030000 // RX_CHAN_STATUS
#define DmaMac_RxChSt_no 0x00000000
#define DmaMac_RxChSt_le 0x00010000
#define DmaMac_RxChSt_he 0x00020000
#define DmaMac_RxDataWMsk 0x000C0000 // RX_IO_DATA_WIDTH
#define DmaMac_RxDataW_8 0x00000000
#define DmaMac_RxDataW_16 0x00040000
#define DmaMac_RxDataW_32 0x00080000
#define DmaMac_RxFifoSzMsk 0x00F00000 // RX_FIFO_SIZE
#define DmaMac_RxFifoSz_2 0x00100000
#define DmaMac_RxFifoSz_4 0x00200000
#define DmaMac_RxFifoSz_8 0x00300000
#define DmaMac_RxFifoSz_16 0x00400000
#define DmaMac_RxFifoSz_32 0x00500000
#define DmaMac_TxChStMsk 0x03000000 // TX_CHAN_STATUS
#define DmaMac_TxChSt_no 0x00000000
#define DmaMac_TxChSt_le 0x01000000
#define DmaMac_TxChSt_he 0x02000000
#define DmaMac_TxDataWMsk 0x0C000000 // TX_IO_DATA_WIDTH
#define DmaMac_TxDataW_8 0x00000000
#define DmaMac_TxDataW_16 0x04000000
#define DmaMac_TxDataW_32 0x08000000
#define DmaMac_TxFifoSzMsk 0xF0000000 // TX_FIFO_SIZE
#define DmaMac_TxFifoSz_2 0x10000000
#define DmaMac_TxFifoSz_4 0x20000000
#define DmaMac_TxFifoSz_8 0x30000000
#define DmaMac_TxFifoSz_16 0x40000000
#define DmaMac_TxFifoSz_32 0x50000000
//-----------------------------------------------------------------------------
//* DMA_MAC Interrupt Sources Enable/Status Register
//-----------------------------------------------------------------------------
//********* Masks
#define DmaMac_IntEn_Msk 0x92ef82ef
#define DmaMac_IntEn_Rst 0x00000000
//********* Masks
#define DmaMac_IntStat_Msk 0x92ef82ef
#define DmaMac_IntStat_Rst 0x00050001
//********* Values
#define DmaMac_RxEmpty 0x00000001
#define DmaMac_RxFull 0x00000002
#define DmaMac_RxEntry 0x00000004
#define DmaMac_RxTo 0x00000008
#define DmaMac_PckLost 0x00000020
#define DmaMac_RxNext 0x00000040
#define DmaMac_RxDone 0x00000080
#define DmaMac_RxMErr 0x00000200
#define DmaMac_RxCurrDone 0x00008000
#define DmaMac_TxEmpty 0x00010000
#define DmaMac_TxFull 0x00020000
#define DmaMac_TxEntry 0x00040000
#define DmaMac_TxTo 0x00080000
//#define DmaMac_TxIOReq 0x00200000
#define DmaMac_TxNext 0x00400000
#define DmaMac_TxDone 0x00800000
#define DmaMac_TxMErr 0x02000000
#define DmaMac_MACInt 0x10000000
#define DmaMac_TxCurrDone 0x80000000
//-----------------------------------------------------------------------------
// DMA_MAC TX/RX DMA Start Register
//-----------------------------------------------------------------------------
//********* Masks
#define DmaMac_RxDMAStart_Msk 0x00ffffe5
#define DmaMac_RxDMAStart_Rst 0x00000000
//********* Masks
#define DmaMac_TxDMAStart_Msk 0x00ffffe5
#define DmaMac_TxDMAStart_Rst 0x00000000
//********* Values
#define DmaMac_DMAEn 0x00000001
#define DmaMac_StartFetch 0x00000004
#define DmaMac_TxPADDis 0x00000040 // TX only
#define DmaMac_TxAddCRCDis 0x00000080 // TX only
#define DmaMac_RxFilterFail 0x00000020 // RX only
#define DmaMac_RxRuntFrame 0x00000040 // RX only
#define DmaMac_RxCollSeen 0x00000080 // RX only
#define DmaMac_DFetchDlyMsk 0x00FFFF00
#define DmaMac_DFetchDlyU 0x00000100
//-----------------------------------------------------------------------------
// DMA_MAC TX/RX DMA Cntl Register
//-----------------------------------------------------------------------------
//********* Masks
#define DmaMac_RxDMACntl_Msk 0xffffdfff
#define DmaMac_RxDMACntl_Rst 0x00000000
//********* Masks
#define DmaMac_TxDMACntl_Msk 0xffffdfff
#define DmaMac_TxDMACntl_Rst 0x00000000
//********* Values
#define DmaMac_XferCntMsk 0x00000FFF
#define DmaMac_XferCntU 0x00000001
#define DmaMac_ContEn 0x00001000
#define DmaMac_NxtEn 0x00004000
#define DmaMac_DlyEn 0x00008000
#define DmaMac_Valid 0x00010000
#define DmaMac_EntryTrigMsk 0x003E0000
#define DmaMac_EntryTrigU 0x00020000
#define DmaMac_AddrWrapMsk 0xFFC00000
#define DmaMac_AddrWrapU 0x00400000
//*****************************************************************************
//* DMA_MAC TX/RX DMA Addr
//*****************************************************************************
//********* Mask
#define DmaMac_RxDMAAddr_Msk 0xffffffff
//********* Mask
#define DmaMac_TxDMAAddr_Msk 0xffffffff
//********* Values
#define DmaMac_WrapEn 0x00000001
#define DmaMac_FixAddr 0x00000002
#define DmaMac_DMAAddrMsk 0xFFFFFFFC
#define DmaMac_DMAAddrU 0x00000004
//-----------------------------------------------------------------------------
// DMA_MAC TX/RX DMA Next Address
//-----------------------------------------------------------------------------
//********* Mask
#define DmaMac_RxDMANext_Msk 0xffffffff
//********* Mask
#define DmaMac_TxDMANext_Msk 0xffffffff
//********* Values
#define DmaMac_NpolEn 0x00000001
#define DmaMac_DescrAddrMsk 0xFFFFFFFC
#define DmaMac_DescrAddrU 0x00000004
//-----------------------------------------------------------------------------
// DMA_MAC TX/RX DMA Current Address
//-----------------------------------------------------------------------------
//********* Mask
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