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📄 bulkloop.c

📁 该模块基于USB FX2开发板
💻 C
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#pragma NOIV               // Do not generate interrupt vectors
//-----------------------------------------------------------------------------
//   File:      bulkloop.c
//   Contents:   Hooks required to implement USB peripheral function.
//
//   Copyright (c) 2000 Cypress Semiconductor All rights reserved
//-----------------------------------------------------------------------------
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h"            // SYNCDELAY macro

extern BOOL GotSUD;             // Received setup data flag
extern BOOL Sleep;
extern BOOL Rwuen;
extern BOOL Selfpwr;

BYTE Configuration;             // Current configuration
BYTE AlternateSetting;          // Alternate settings

#define VR_NAKALL_ON    0xD0
#define VR_NAKALL_OFF   0xD1
//sbit PD_0 = IOD^0;
//sbit PD_1 = 0xB0^1;
//sbit PD_2 = 0xB0^2;
//sbit OED_0 = 0xB5 + 0;

//-----------------------------------------------------------------------------
// Task Dispatcher hooks
//   The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------

void TD_Init(void)             // Called once at startup
{
   // set the CPU clock to 48MHz
   CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;

   // set the slave FIFO interface to 48MHz
   IFCONFIG |= 0x40;
	IFCONFIG &= 0xfc;

  // Registers which require a synchronization delay, see section 15.14
  // FIFORESET        FIFOPINPOLAR
  // INPKTEND         OUTPKTEND
  // EPxBCH:L         REVCTL
  // GPIFTCB3         GPIFTCB2
  // GPIFTCB1         GPIFTCB0
  // EPxFIFOPFH:L     EPxAUTOINLENH:L
  // EPxFIFOCFG       EPxGPIFFLGSEL
  // PINFLAGSxx       EPxFIFOIRQ
  // EPxFIFOIE        GPIFIRQ
  // GPIFIE           GPIFADRH:L
  // UDMACRCH:L       EPxGPIFTRIG
  // GPIFTRIG
  
  // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  //      ...these have been replaced by GPIFTC[B3:B0] registers

  // default: all endpoints have their VALID bit set
  // default: TYPE1 = 1 and TYPE0 = 0 --> BULK  
  // default: EP2 and EP4 DIR bits are 0 (OUT direction)
  // default: EP6 and EP8 DIR bits are 1 (IN direction)
  // default: EP2, EP4, EP6, and EP8 are double buffered

  // we are just using the default values, yes this is not necessary...
  EP1OUTCFG = 0xA0;
  EP1INCFG = 0xA0;
  SYNCDELAY;                    // see TRM section 15.14
  EP2CFG = 0x22; //0xA2;
  SYNCDELAY;                    
  EP4CFG = 0xA0;
  SYNCDELAY;                    
  EP6CFG = 0x22; //0xE2;
  SYNCDELAY;                    
  EP8CFG = 0xE0;

  // out endpoints do not come up armed
  
  // since the defaults are double buffered we must write dummy byte counts twice
  //SYNCDELAY;                    
  //EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
  //SYNCDELAY;                    
  //EP2BCL = 0x80;
  SYNCDELAY;                    
  EP4BCL = 0x80;                // arm EP4OUT by writing byte count w/skip.
  SYNCDELAY;                    
  EP4BCL = 0x80;    

  // enable dual autopointer feature
  AUTOPTRSETUP |= 0x01;

  Rwuen = TRUE;                 // Enable remote-wakeup

  //EZUSB_InitI2C();    // Initialize EZ-USB I2C controller

  //PA0~7 and PB7 used as Input GPIO , while PD0~7 and PB0~6 are used as Output GPIO
  OED = 0xff;
  OEB = 0x7f;
  OEA = 0x00;

}


void TD_Poll(void)              // Called repeatedly while the device is idle
{
	BYTE GPIOPinSet = 0x00;
	int i;
/*
  if(!(EP2468STAT & bmEP2EMPTY))
  { // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
     if(!(EP2468STAT & bmEP6FULL))
     {  // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
        APTR1H = MSB( &EP2FIFOBUF );
        APTR1L = LSB( &EP2FIFOBUF );

        AUTOPTRH2 = MSB( &EP6FIFOBUF );
        AUTOPTRL2 = LSB( &EP6FIFOBUF );

        count = (EP2BCH << 8) + EP2BCL;

        // loop EP2OUT buffer data to EP6IN
        for( i = 0x0000; i < count; i++ )
        {
           // setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s)
           EXTAUTODAT2 = EXTAUTODAT1;
        }
        EP6BCH = EP2BCH;  
        SYNCDELAY;  
        EP6BCL = EP2BCL;        // arm EP6IN
        SYNCDELAY;                    
        EP2BCL = 0x80;          // re(arm) EP2OUT
     }
  }
*/
  if(!(EP2468STAT & bmEP4EMPTY))
  { // check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty

  	//if(!(EP2468STAT & bmEP8FULL))
     {  // check EP8 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
		if (EP4FIFOBUF[0x10] < 0x80) //output pins setting 
		{
			GPIOPinSet = EP4FIFOBUF[0x10];
			switch (GPIOPinSet) 
			{
			case 0x00:		//all clear 0
				IOD = 0x00;
				IOB = IOB & 0x80;
				break;
			case 0x01:		//begin setting 1
				IOD = IOD | 0x01;
				break;
			case 0x02:
				IOD = IOD | 0x02;
				break;
			case 0x03:
				IOD = IOD | 0x04;
				break;
			case 0x04:
				IOD = IOD | 0x08;
				break;
			case 0x05:
				IOD = IOD | 0x10;
				break;
			case 0x06:
				IOD = IOD | 0x20;
				break;
			case 0x07:
				IOD = IOD | 0x40;
				break;
			case 0x08:
				IOD = IOD | 0x80;
				break;
			case 0x09:
				IOB = IOB | 0x01;
				break;
			case 0x0a:
				IOB = IOB | 0x02;
				break;
			case 0x0b:
				IOB = IOB | 0x04;
				break;
			case 0x0c:
				IOB = IOB | 0x08;
				break;
			case 0x0d:
				IOB = IOB | 0x10;
				break;
			case 0x0e:
				IOB = IOB | 0x20;
				break;
			case 0x0f:		//set 1 end;
				IOB = IOB | 0x40;
				break;
			case 0x40:		//all set 1, means all output
				IOB = IOB | 0x7f;
				IOD = 0xff;
				break;
			case 0x41:		//begin clear 0;
				IOD = IOD & 0xfe;
				break;
			case 0x42:
				IOD = IOD & 0xfd;
				break;
			case 0x43:
				IOD = IOD & 0xfb;
				break;
			case 0x44:
				IOD = IOD & 0xf7;
				break;
			case 0x45:
				IOD = IOD & 0xef;
				break;
			case 0x46:
				IOD = IOD & 0xdf;
				break;
			case 0x47:
				IOD = IOD & 0xbf;
				break;
			case 0x48:
				IOD = IOD & 0x7f;
				break;
			case 0x49:
				IOB = IOB & 0x7e;
				break;
			case 0x4a:
				IOB = IOB & 0x7d;
				break;
			case 0x4b:
				IOB = IOB & 0x7b;
				break;
			case 0x4c:
				IOB = IOB & 0x77;
				break;
			case 0x4d:
				IOB = IOB & 0x6f;
				break;
			case 0x4e:
				IOB = IOB & 0x5f;
				break;
			case 0x4f:
				IOB = IOB & 0x3f;
				break;
			default:
				break;				
			}
			for (i=0;i<64;i+=2)
			{
				EP8FIFOBUF[i] = IOD;
				EP8FIFOBUF[i+1] = IOB;
			}
        	EP8BCH = 0x0;  
        	SYNCDELAY;  
        	EP8BCL = 64;        // arm EP8IN
        	SYNCDELAY;
		}
		else		//input pins setting
		{
			GPIOPinSet = EP4FIFOBUF[0x10];
			switch (GPIOPinSet) 
			{
			case 0x80:		//all clear 0
				IOA = 0x00;
				IOB = IOB & 0x7f;
				break;
			case 0x81:		//begin to set 1 (input pins)
				IOA = IOA | 0x01;
				break;
			case 0x82:
				IOA = IOA | 0x02;
				break;
			case 0x83:
				IOA = IOA | 0x04;
				break;
			case 0x84:
				IOA = IOA | 0x08;
				break;
			case 0x85:
				IOA = IOA | 0x10;
				break;
			case 0x86:
				IOA = IOA | 0x20;
				break;
			case 0x87:
				IOA = IOA | 0x40;
				break;
			case 0x88:
				IOA = IOA | 0x80;
				break;
			case 0x89:		//set 1 end;
				IOB = IOB | 0x80;
				break;
			case 0xc0:		//all set 1
				IOA = 0xff;
				IOB = IOB | 0x80;
				break;
			case 0xc1:		//begin clear 0
				IOA = IOA & 0xfe;
				break;
			case 0xc2:
				IOA = IOA & 0xfd;
				break;
			case 0xc3:
				IOA = IOA & 0xfb;
				break;
			case 0xc4:
				IOA = IOA & 0xf7;
				break;
			case 0xc5:
				IOA = IOA & 0xef;
				break;
			case 0xc6:
				IOA = IOA & 0xdf;
				break;
			case 0xc7:
				IOA = IOA & 0xbf;
				break;
			case 0xc8:
				IOA = IOA & 0x7f;
				break;
			case 0xc9:			//clear 0 end
				IOB = IOB & 0x7f;
				break;
			default:
				break;
			}
			for (i=0;i<64;i+=2)
			{
				EP8FIFOBUF[i] = IOA;
				EP8FIFOBUF[i+1] = IOB;
			}
        	EP8BCH = 0x0;  
        	SYNCDELAY;  
        	EP8BCL = 64;        // arm EP8IN
        	SYNCDELAY;
		}


        SYNCDELAY;                    
        EP4BCL = 0x80;          // re(arm) EP4OUT
     }
  }
}

BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
{
   return(TRUE);
}

BOOL TD_Resume(void)          // Called after the device resumes
{
   return(TRUE);
}

//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{
   return(TRUE);
}

BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
{
   Configuration = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
{
   EP0BUF[0] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
{
   AlternateSetting = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
{
   EP0BUF[0] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_GetStatus(void)
{
   return(TRUE);
}

BOOL DR_ClearFeature(void)
{
   return(TRUE);
}

BOOL DR_SetFeature(void)
{
   return(TRUE);
}

BOOL DR_VendorCmnd(void)
{
  BYTE tmp;
  
  switch (SETUPDAT[1])
  {
     case VR_NAKALL_ON:
        tmp = FIFORESET;
        tmp |= bmNAKALL;      
        SYNCDELAY;                    
        FIFORESET = tmp;
        break;
     case VR_NAKALL_OFF:
        tmp = FIFORESET;
        tmp &= ~bmNAKALL;      
        SYNCDELAY;                    
        FIFORESET = tmp;
        break;
     default:
        return(TRUE);
  }

  return(FALSE);
}

//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------

// Setup Data Available Interrupt Handler
void ISR_Sudav(void) interrupt 0
{
   GotSUD = TRUE;            // Set flag
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUDAV;         // Clear SUDAV IRQ
}

// Setup Token Interrupt Handler
void ISR_Sutok(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUTOK;         // Clear SUTOK IRQ
}

void ISR_Sof(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSOF;            // Clear SOF IRQ
}

void ISR_Ures(void) interrupt 0
{
   // whenever we get a USB reset, we should revert to full speed mode
   pConfigDscr = pFullSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
   pOtherConfigDscr = pHighSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmURES;         // Clear URES IRQ
}

void ISR_Susp(void) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUSP;
}

void ISR_Highspeed(void) interrupt 0
{
   if (EZUSB_HIGHSPEED())
   {
      pConfigDscr = pHighSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
      pOtherConfigDscr = pFullSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   }

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmHSGRANT;
}
void ISR_Ep0ack(void) interrupt 0
{
}
void ISR_Stub(void) interrupt 0
{
}
void ISR_Ep0in(void) interrupt 0
{
}
void ISR_Ep0out(void) interrupt 0
{
}
void ISR_Ep1in(void) interrupt 0
{
}
void ISR_Ep1out(void) interrupt 0
{
}
void ISR_Ep2inout(void) interrupt 0
{
}
void ISR_Ep4inout(void) interrupt 0
{
}
void ISR_Ep6inout(void) interrupt 0
{
}
void ISR_Ep8inout(void) interrupt 0
{
}
void ISR_Ibn(void) interrupt 0
{
}
void ISR_Ep0pingnak(void) interrupt 0
{
}
void ISR_Ep1pingnak(void) interrupt 0
{
}
void ISR_Ep2pingnak(void) interrupt 0
{
}
void ISR_Ep4pingnak(void) interrupt 0
{
}
void ISR_Ep6pingnak(void) interrupt 0
{
}
void ISR_Ep8pingnak(void) interrupt 0
{
}
void ISR_Errorlimit(void) interrupt 0
{
}
void ISR_Ep2piderror(void) interrupt 0
{
}
void ISR_Ep4piderror(void) interrupt 0
{
}
void ISR_Ep6piderror(void) interrupt 0
{
}
void ISR_Ep8piderror(void) interrupt 0
{
}
void ISR_Ep2pflag(void) interrupt 0
{
}
void ISR_Ep4pflag(void) interrupt 0
{
}
void ISR_Ep6pflag(void) interrupt 0
{
}
void ISR_Ep8pflag(void) interrupt 0
{
}
void ISR_Ep2eflag(void) interrupt 0
{
}
void ISR_Ep4eflag(void) interrupt 0
{
}
void ISR_Ep6eflag(void) interrupt 0
{
}
void ISR_Ep8eflag(void) interrupt 0
{
}
void ISR_Ep2fflag(void) interrupt 0
{
}
void ISR_Ep4fflag(void) interrupt 0
{
}
void ISR_Ep6fflag(void) interrupt 0
{
}
void ISR_Ep8fflag(void) interrupt 0
{
}
void ISR_GpifComplete(void) interrupt 0
{
}
void ISR_GpifWaveform(void) interrupt 0
{
}

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